[Bug tree-optimization/77980] missing optimization with division

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77980 Roger Sayle changed: What|Removed |Added CC||roger at nextmovesoftware dot com --- Com

[Bug rtl-optimization/102031] [12 Regression] ICE in simplify_truncation, at simplify-rtx.c:620 since r12-3074-g7e5f9ead16d7514b3baa0254084de94f0bfcd216

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102031 Roger Sayle changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |roger at nextmovesoftware dot com

[Bug middle-end/102029] [12 Regression] ice: error: type mismatch in ‘lshift_expr’

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102029 Roger Sayle changed: What|Removed |Added CC||roger at nextmovesoftware dot com

[Bug tree-optimization/101403] [12 Regression] wrong code with __builtin_bswap16() at -O1 by r12-2137

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101403 Roger Sayle changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug middle-end/100810] [12 Regression] wrong code at -O1 and above on x86_64-linux-gnu since r12-397-gda9e6e63d1ae22e530ec7baf59f6ed028bf05776

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100810 --- Comment #4 from Roger Sayle --- I believe this bug occurs during the .195t.ccp4 pass that was introduced by the commit identified above, where tree-ssa-propagate.c's substitute_and_fold_engine appears not to correctly handle the situation of

[Bug middle-end/101642] [12 Regression] ice in decompose, at wide-int.h:984

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101642 Roger Sayle changed: What|Removed |Added CC||roger at nextmovesoftware dot com --- Co

[Bug tree-optimization/101403] [12 Regression] wrong code with __builtin_bswap16() at -O1 by r12-2137

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101403 Roger Sayle changed: What|Removed |Added Status|NEW |ASSIGNED Assignee|unassigned at

[Bug tree-optimization/96392] Optimize x+0.0 if x is an integer

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96392 Roger Sayle changed: What|Removed |Added CC||roger at nextmovesoftware dot com

[Bug tree-optimization/40210] gcc byte swap builtins inadequately optimized

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=40210 Roger Sayle changed: What|Removed |Added CC||roger at nextmovesoftware dot com

[Bug target/11877] gcc should use xor trick with -Os

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=11877 Roger Sayle changed: What|Removed |Added Resolution|--- |FIXED CC|

[Bug middle-end/19986] [meta-bug] fold missing optimizations (compared to RTL)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19986 Bug 19986 depends on bug 20517, which changed state. Bug 20517 Summary: bit shift/mask optimization potential https://gcc.gnu.org/bugzilla/show_bug.cgi?id=20517 What|Removed |Added --

[Bug tree-optimization/20517] bit shift/mask optimization potential

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=20517 Roger Sayle changed: What|Removed |Added Status|NEW |RESOLVED CC|

[Bug tree-optimization/89198] GCC generates/fails to optimize unnecessary sign extension instruction

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89198 Roger Sayle changed: What|Removed |Added Target Milestone|--- |11.0 Status|UNCONFIRMED

[Bug rtl-optimization/46235] inefficient bittest code generation

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46235 Roger Sayle changed: What|Removed |Added CC||roger at nextmovesoftware dot com

[Bug middle-end/100810] [12 Regression] wrong code at -O1 and above on x86_64-linux-gnu since r12-397-gda9e6e63d1ae22e530ec7baf59f6ed028bf05776

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100810 Roger Sayle changed: What|Removed |Added CC||roger at nextmovesoftware dot com --- Co

[Bug rtl-optimization/40772] generating rendundant moves from second byte of 32b/64b register

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=40772 Roger Sayle changed: What|Removed |Added Resolution|--- |FIXED CC|

[Bug middle-end/98713] Failure to generate branch version of abs if user requested it

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98713 --- Comment #7 from Roger Sayle --- I agree in the general case, a conditional jump (that depends only on the condition flags) potentially has a shorter dependence chain than a cmov (which depends on the condition flags and two registers). But i

[Bug tree-optimization/98095] Optimize __builtin_unordered (...) || __builtin_is{less,greater}{,equal}

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98095 Roger Sayle changed: What|Removed |Added Last reconfirmed||2021-01-18 CC|

[Bug middle-end/98713] Failure to generate branch version of abs if user requested it

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98713 Roger Sayle changed: What|Removed |Added CC||roger at nextmovesoftware dot com --- Com

[Bug rtl-optimization/97978] [11 Regression] ICE in lra_assign, at lra-assigns.c:1648 since r11-5066-gbe39636d9f68c437

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97978 --- Comment #2 from Roger Sayle --- The -fno-PIC isn't required, as -Os alone is sufficient to trigger this ICE. I'm not sure if unconditionally calling __builtin_unreachable qualifies as "valid-code" (or possibly an error condition) but lra_assi

<    1   2   3   4   5