[Bug rtl-optimization/117297] [15 Regression] late combine undoes too much

2024-10-28 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117297 Richard Sandiford changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org

[Bug target/117248] gcc/libgcc/libgcc2.h:232:25: internal compiler error: Arithmetic exception

2024-10-22 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117248 --- Comment #2 from Richard Sandiford --- Also, could you check whether g:9bd19ff515c95af71b29bc6e232785532afa6823 makes a difference?

[Bug target/117169] New: Missed opportunity to combine sign and bitmask tests

2024-10-16 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
: enhancement Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: rsandifo at gcc dot gnu.org Target Milestone: --- Target: aarch64*-*-* int f1(int x) { return x < 0 || x & 3; } on aarch64 produces: f1: tbn

[Bug rtl-optimization/116550] [lra][avr] internal compiler error: in final_scan_insn_1, at final.cc:2807

2024-10-09 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116550 --- Comment #12 from Richard Sandiford --- (In reply to denisc from comment #4) > Explanation. > […] Thanks for the great explanation! Based on that, the patch LGTM FWIW, although Vlad should have the final say.

[Bug target/55212] [SH] Switch to LRA

2024-10-09 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212 --- Comment #389 from Richard Sandiford --- (In reply to Oleg Endo from comment #304) > (define_insn "block_lump_real" > [(set (mem:BLK (match_operand:SI 2 "sfunc_arg0_reg" "=r,r")) > (mem:BLK (match_operand:SI 3 "sfunc_arg1_reg" "=r,r

[Bug target/116629] [14 Regression] Building openvino with -flto ICEs in aarch64_sve::gimple_folder::redirect_pred_x

2024-10-09 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116629 Richard Sandiford changed: What|Removed |Added Known to work||15.0 Summary|[14/15 Regr

[Bug target/117045] Incorrect fold of SVE's svwhilele

2024-10-09 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117045 --- Comment #3 from Richard Sandiford --- Ah, yeah, the patch fixes that too. The easiest fix seemed to be to handle the degenerate cases up-front rather than as part of constant folding. I deliberately left off folding svwhilelt(INT_MAX, x) t

[Bug target/117045] Incorrect fold of SVE's svwhilele

2024-10-09 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
|1 Assignee|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org Last reconfirmed||2024-10-09 --- Comment #1 from Richard Sandiford --- I'll send a patch soon.

[Bug target/117045] New: Incorrect fold of SVE's svwhilele

2024-10-09 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
y: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: rsandifo at gcc dot gnu.org Target Milestone: --- Target: aarch64*-*-* #include #include svbool_t f() { return svwhilele_b8_s32(INT_MAX, INT_MAX); } is folded to: ptrue p0.b

[Bug target/109498] SVE support for ctz

2024-10-08 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109498 Richard Sandiford changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug tree-optimization/116578] vectorizer SLP transition issues / dependences

2024-10-07 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116578 Bug 116578 depends on bug 116583, which changed state. Bug 116583 Summary: vectorizable_slp_permutation cannot handle even/odd extract from VLA vector https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116583 What|Removed

[Bug tree-optimization/116583] vectorizable_slp_permutation cannot handle even/odd extract from VLA vector

2024-10-07 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116583 Richard Sandiford changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug tree-optimization/116583] vectorizable_slp_permutation cannot handle even/odd extract from VLA vector

2024-10-02 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116583 --- Comment #10 from Richard Sandiford --- I have a proof-of-concept hack (far from submission quality). But it looks like some cases will also require us to extend aarch64_evpc_reencode to handle SVE modes, which is also worthwhile for its own

[Bug tree-optimization/116583] vectorizable_slp_permutation cannot handle even/odd extract from VLA vector

2024-10-02 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org --- Comment #9 from Richard Sandiford --- Mine. Lets see if I can remember how this “vectoriser” thing works…

[Bug target/116629] [14/15 Regression] Building openvino with -flto ICEs in aarch64_sve::gimple_folder::redirect_pred_x

2024-10-01 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116629 Richard Sandiford changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org

[Bug tree-optimization/116583] vectorizable_slp_permutation cannot handle even/odd extract from VLA vector

2024-09-30 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116583 --- Comment #7 from Richard Sandiford --- ...actually, they probably don't need to bijective. I suppose [0, 0] for two-lane SLP is handled too.

[Bug tree-optimization/116583] vectorizable_slp_permutation cannot handle even/odd extract from VLA vector

2024-09-30 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116583 --- Comment #6 from Richard Sandiford --- Sorry for the slow response (here and in general). Been having to spend my time on other things recently :( I agree that this case is regular enough to handle for VLA, but it seems to me like a separat

[Bug rtl-optimization/116326] [lra] internal compiler error: in get_reload_reg, at lra-constraints.cc:755

2024-08-30 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116326 --- Comment #8 from Richard Sandiford --- (In reply to Georg-Johann Lay from comment #7) > What about the following line in reload1.h: > > // Used during roload -> LRA transition because ELIMINABLE_REGS may depend > // on command line options.

[Bug rtl-optimization/116326] [lra] internal compiler error: in get_reload_reg, at lra-constraints.cc:755

2024-08-30 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116326 --- Comment #6 from Richard Sandiford --- (In reply to Georg-Johann Lay from comment #5) > > But either way, I think we should start with the assumption that the entry > > should be removed and make everything else work to that. Unfortunately t

[Bug rtl-optimization/116326] [lra] internal compiler error: in get_reload_reg, at lra-constraints.cc:755

2024-08-30 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116326 --- Comment #4 from Richard Sandiford --- (In reply to Georg-Johann Lay from comment #3) > It was due to problems with multi-reg frame-pointer. (AFAIR, using a > hard-frame-poiner besides frame-poiner didn't resolve the issues.) > > My problem

[Bug rtl-optimization/116326] [lra] internal compiler error: in get_reload_reg, at lra-constraints.cc:755

2024-08-30 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116326 Richard Sandiford changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug rtl-optimization/116516] [15 Regression] [lra] ICE in decompose_normal_address, at rtlanal.cc:6712 by r15-3213-g708ee71808ea61

2024-08-29 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116516 Richard Sandiford changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug tree-optimization/116481] [12/13/14/15 Regression] `arrays of functions are not meaningful` error message happens with -W -Wall -O2 even though there are no arrays of function types used

2024-08-28 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116481 --- Comment #10 from Richard Sandiford --- (In reply to Richard Sandiford from comment #9) > If the tag bit is dropped by going > out of bounds, that's a feature, not a bug, and would happen equally for > void*/char* arithmetic as for (u)intptr_

[Bug tree-optimization/116481] [12/13/14/15 Regression] `arrays of functions are not meaningful` error message happens with -W -Wall -O2 even though there are no arrays of function types used

2024-08-28 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116481 Richard Sandiford changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug rtl-optimization/116516] [15 Regression] [lra] ICE in decompose_normal_address, at rtlanal.cc:6712 by r15-3213-g708ee71808ea61

2024-08-28 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org --- Comment #3 from Richard Sandiford --- Gah, mine then.

[Bug fortran/116254] new test case gfortran.dg/class_transformational_2.f90 from r15-2739-g4cb07a38233aad fails

2024-08-21 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116254 Richard Sandiford changed: What|Removed |Added Status|UNCONFIRMED |NEW Ever confirmed|0

[Bug fortran/116254] new test case gfortran.dg/class_transformational_2.f90 from r15-2739-g4cb07a38233aad fails

2024-08-21 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116254 Richard Sandiford changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug rtl-optimization/116238] [12/13/14 Regression] ICE building 526.blender_r on aarch64 SVE after r15-1619-g3b9b8d6cfdf593

2024-08-21 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116238 Richard Sandiford changed: What|Removed |Added Known to fail|15.0|14.2.1 Summary|[12/13/14

[Bug target/116413] [LRA] [M68K] ICE: unrecognized insn in lra_set_insn_recog_data, at lra.cc:1036

2024-08-21 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116413 --- Comment #17 from Richard Sandiford --- Hmm, but if the ICE is coming from vregs then it doesn't sound like it's related to LRA. vregs is the first RTL pass to run.

[Bug target/116413] [LRA] [M68K] ICE: unrecognized insn in lra_set_insn_recog_data, at lra.cc:1036

2024-08-21 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116413 --- Comment #14 from Richard Sandiford --- Created attachment 58967 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=58967&action=edit Patch for the decompse_mem_address ICE Thanks. Can you try the attached patch?

[Bug target/116413] [LRA] [M68K] ICE: unrecognized insn in lra_set_insn_recog_data, at lra.cc:1036

2024-08-21 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116413 --- Comment #11 from Richard Sandiford --- I can't reproduce this with m68k-elf. Do you have any local changes beyond making TARGET_LRA_P return true?

[Bug rtl-optimization/116321] [lra][avr] internal compiler error: in avr_out_lpm_no_lpmx, at config/avr/avr.cc:4572

2024-08-20 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116321 Richard Sandiford changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug rtl-optimization/116238] [15 Regression] ICE building 526.blender_r on aarch64 SVE after r15-1619-g3b9b8d6cfdf593

2024-08-20 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org --- Comment #5 from Richard Sandiford --- Yeah, seems to be a latent bug in aarch64_hard_regno_caller_save_mode. A brute-force reproducer is: void foo(); typedef unsigned char v2qi __attribute__((vector_size(2))); void f(v2qi *ptr

[Bug target/116413] [LRA] [M68K] ICE: unrecognized insn in lra_set_insn_recog_data, at lra.cc:1036

2024-08-20 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116413 Richard Sandiford changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug target/115683] [15 Regression] SSE2 regressions after obselete of vcond{,u,eq}.

2024-08-20 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115683 --- Comment #8 from Richard Sandiford --- (In reply to Uroš Bizjak from comment #7) > Richi, maybe tree optimizers can perform their optimizations with > vec_cmp{,u} and vcond_mask, and at the end provide the true coditional > vector move (that

[Bug target/114603] aarch64: Invalid SVE cnot optimisation

2024-08-16 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114603 Richard Sandiford changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/114607] aarch64: Incorrect expansion of svsudot

2024-08-16 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114607 Richard Sandiford changed: What|Removed |Added Known to work||12.4.1, 13.3.1, 14.1.0,

[Bug target/115464] [14 Backport] ICE when building libaom on arm64 (neon sve bridge usage with tbl/perm)

2024-08-15 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464 Richard Sandiford changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug target/113939] Switch m68k to LRA

2024-08-15 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113939 Bug 113939 depends on bug 116236, which changed state. Bug 116236 Summary: [LRA] [M68K] ICE insn does not satisfy its constraints https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116236 What|Removed |Added

[Bug target/116236] [LRA] [M68K] ICE insn does not satisfy its constraints

2024-08-15 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116236 Richard Sandiford changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug target/116343] [15 regression] ICE on valid code at -Os with "-fschedule-insns -fno-thread-jumps -fno-dce" on x86_64-linux-gnu: in extract_insn, at recog.cc:2869

2024-08-15 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116343 Richard Sandiford changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug target/116236] [LRA] [M68K] ICE insn does not satisfy its constraints

2024-08-15 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116236 --- Comment #22 from Richard Sandiford --- (In reply to Michael Matz from comment #21) > (In reply to Richard Sandiford from comment #17) > > > But if LRA needs to be extended for correctness, then, ... meh. > > But this is how it's always worke

[Bug target/116371] The SME2 svpext intrinsics are missing a _lane suffix

2024-08-15 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116371 --- Comment #2 from Richard Sandiford --- Fixed on trunk. I'll wait a bit before backporting.

[Bug target/116371] The SME2 svpext intrinsics are missing a _lane suffix

2024-08-14 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116371 Richard Sandiford changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org

[Bug target/116371] New: The SME2 svpext intrinsics are missing a _lane suffix

2024-08-14 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: rsandifo at gcc dot gnu.org Target Milestone: --- Target: aarch64*-*-* The intrinsics for PEXT are supposed to be called svpext_lane_cN and svpext_lane_cN_x2, but

[Bug target/116236] [LRA] [M68K] ICE insn does not satisfy its constraints

2024-08-13 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116236 --- Comment #19 from Richard Sandiford --- Of course, immediately after posting I realise it should be address_mode instead of pointer_mode, but that shouldn't affect m68k.

[Bug target/116236] [LRA] [M68K] ICE insn does not satisfy its constraints

2024-08-13 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116236 --- Comment #18 from Richard Sandiford --- Created attachment 58927 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=58927&action=edit Candidate patch Could you try the attached patch? It seems to fix the reduced testcase for me.

[Bug target/116236] [LRA] [M68K] ICE insn does not satisfy its constraints

2024-08-13 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org --- Comment #17 from Richard Sandiford --- (In reply to Michael Matz from comment #16) > (In reply to Richard Sandiford from comment #15) > > > Yes, I considered adding this handling of (zero_extend Rx) to LRA. I'

[Bug target/116236] [LRA] [M68K] ICE insn does not satisfy its constraints

2024-08-13 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116236 --- Comment #15 from Richard Sandiford --- (In reply to Michael Matz from comment #14) > (In reply to Richard Sandiford from comment #13) > > (In reply to Michael Matz from comment #12) > > > That's why I struggle a bit, I lack the bigger pictur

[Bug target/116343] [15 regression] ICE on valid code at -Os with "-fschedule-insns -fno-thread-jumps -fno-dce" on x86_64-linux-gnu: in extract_insn, at recog.cc:2869

2024-08-13 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org --- Comment #5 from Richard Sandiford --- Argh, substituting into the REG_EQUAL note is causing INSN_CODE to be reset. Testing a patch…

[Bug target/116343] [15 regression] ICE on valid code at -Os with "-fschedule-insns -fno-thread-jumps -fno-dce" on x86_64-linux-gnu: in extract_insn, at recog.cc:2869

2024-08-12 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116343 --- Comment #4 from Richard Sandiford --- (In reply to Andrew Pinski from comment #3) > Note I think late_combine 1 depends on DCE later on to delete the > noop_move_p instructions but since -fno-dce was passed on the command line, > it is not d

[Bug target/116312] Use LDP instead of LD2 on for Advanced SIMD when possible

2024-08-12 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116312 Richard Sandiford changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug target/116236] [LRA] [M68K] ICE insn does not satisfy its constraints

2024-08-12 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116236 Richard Sandiford changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug other/30920] Incorrect splaying that fails to assure the caching property

2024-08-12 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=30920 --- Comment #8 from Richard Sandiford --- The patch in comment 7 is just one step.

[Bug target/116145] SVE constant pool loads not hoisted outside loops

2024-08-05 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116145 Richard Sandiford changed: What|Removed |Added Resolution|FIXED |--- Status|RESOLVED

[Bug rtl-optimization/116200] [15 regression] ICE in stage 2 since r15-2696-gba730fd10934e4

2024-08-05 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116200 Richard Sandiford changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug other/30920] Incorrect splaying that fails to assure the caching property

2024-08-02 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=30920 Richard Sandiford changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Ever confirmed|0

[Bug target/116145] SVE constant pool loads not hoisted outside loops

2024-08-02 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116145 Richard Sandiford changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/116145] Suboptimal SVE immediate synthesis

2024-07-31 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116145 Richard Sandiford changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org

[Bug target/116145] Suboptimal SVE immediate synthesis

2024-07-31 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116145 Richard Sandiford changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug target/115881] [15 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1934 with -O2 -mx32 -maddress-mode=long

2024-07-31 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115881 Richard Sandiford changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug tree-optimization/116109] Missed optimisation: unnecessary register dependency on reduction

2024-07-30 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116109 Richard Sandiford changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug rtl-optimization/116136] [15 Regression] ext-dce exposes latent subreg simplification bug (big-endian) on m68k

2024-07-30 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116136 Richard Sandiford changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug tree-optimization/116100] (VEC_COND (UNCOND_EXPR)) -> COND_FN conversion should happen in isel

2024-07-29 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116100 Richard Sandiford changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug target/116044] [15 Regression] GCN vs. rtl-ssa: Avoid using a stale splay tree root [PR116009]

2024-07-25 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116044 Richard Sandiford changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug middle-end/116058] [15 Regression] sh4-linux-gnu fails to bootstrap, late combine issue

2024-07-24 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116058 Richard Sandiford changed: What|Removed |Added CC|richard.sandiford at arm dot com |rsandifo at gcc dot gnu.org

[Bug target/116044] [15 Regression] GCN vs. rtl-ssa: Avoid using a stale splay tree root [PR116009]

2024-07-23 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org Ever confirmed|0 |1 Status|UNCONFIRMED |ASSIGNED --- Comment #2 from Richard Sandiford --- Gah, this part of the code is causing more than it's fair share of trouble…

[Bug rtl-optimization/116009] [15 regression] ICE when building cython-3.0.10 on arm64 for Python 3.12 (insert_def_after, at rtl-ssa/accesses.cc:622)

2024-07-22 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116009 Richard Sandiford changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug target/115969] [15 regression] ICE when building clang-16.0.6 on arm64 (output_operand: invalid expression as operand)

2024-07-22 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115969 Richard Sandiford changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug rtl-optimization/116009] [15 regression] ICE when building cython-3.0.10 on arm64 for Python 3.12 (insert_def_after, at rtl-ssa/accesses.cc:622)

2024-07-22 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org --- Comment #6 from Richard Sandiford --- Testing a patch.

[Bug target/115406] [15 Regression] wrong code with vector compare at -O0 with -mavx512f since r15-920-gb6c6d5abf0d31c

2024-07-19 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115406 Richard Sandiford changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug tree-optimization/115991] [15 Regression] ICE on linux-6.10 in ix86_print_operand_address_as() since r15-1945-g9d20529d94b232

2024-07-19 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115991 --- Comment #9 from Richard Sandiford --- (In reply to Andrew Pinski from comment #7) > (In reply to Sam James from comment #6) > > The ICE bisects to r15-1945-g9d20529d94b232. The ivopts issue needs to be > > done still. > > Note this is basic

[Bug target/115969] [15 regression] ICE when building clang-16.0.6 on arm64 (output_operand: invalid expression as operand)

2024-07-18 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115969 Richard Sandiford changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org

[Bug target/115950] Missed SVE fold to INCP

2024-07-18 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115950 --- Comment #5 from Richard Sandiford --- Alternatively, I suppose we could say that svcntp_bN(svptrue_bN(), pg) etc. should be folded to svcntp_bN(pg, pg) in gimple/expand, and then make the INCP/DECP wrappers only match the equal-predicate ver

[Bug target/115950] Missed SVE fold to INCP

2024-07-18 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115950 Richard Sandiford changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug rtl-optimization/115929] [15 regression] ICE on valid code at -O{2,3} with "-fschedule-insns" on x86_64-linux-gnu: Segmentation fault

2024-07-17 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115929 Richard Sandiford changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug rtl-optimization/115928] [15 regression] ICE on valid code at -O2 with "-fgcse-sm" on x86_64-linux-gnu: in merge_clobber_groups, at rtl-ssa/accesses.cc:757

2024-07-17 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115928 Richard Sandiford changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug rtl-optimization/115929] [15 regression] ICE on valid code at -O{2,3} with "-fschedule-insns" on x86_64-linux-gnu: Segmentation fault

2024-07-16 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115929 --- Comment #3 from Richard Sandiford --- As it turned out, the two tests exposed different bugs. I've submitted a patch for the other one and will close once that's resolved.

[Bug rtl-optimization/115901] [15 regression] ICE when building coreutils-9.5 on arm64 with -O3 -flto -fno-vect-cost-model -ftrivial-auto-var-init=zero

2024-07-16 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115901 Richard Sandiford changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/115891] [15 regression] libgcrypt tests segfault in crc32_less_than_16 with LTO with late-combine

2024-07-16 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115891 Richard Sandiford changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug rtl-optimization/115929] [15 regression] ICE on valid code at -O{2,3} with "-fschedule-insns" on x86_64-linux-gnu: Segmentation fault

2024-07-15 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
|UNCONFIRMED |ASSIGNED Ever confirmed|0 |1 Assignee|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org

[Bug rtl-optimization/115928] [15 regression] ICE on valid code at -O2 with "-fgcse-sm" on x86_64-linux-gnu: in merge_clobber_groups, at rtl-ssa/accesses.cc:757

2024-07-15 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
|UNCONFIRMED |ASSIGNED Ever confirmed|0 |1 Assignee|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org

[Bug rtl-optimization/115901] [15 regression] ICE when building coreutils-9.5 on arm64 with -O3 -flto -fno-vect-cost-model -ftrivial-auto-var-init=zero

2024-07-13 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115901 Richard Sandiford changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org

[Bug target/115891] [15 regression] libgcrypt tests segfault in crc32_less_than_16 with LTO with late-combine

2024-07-12 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
||2024-07-12 Assignee|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org Status|UNCONFIRMED |ASSIGNED --- Comment #3 from Richard Sandiford --- Comes from: trying to combine definition of r5 in: 1058: di:SI=ax:SI into: 299

[Bug rtl-optimization/115785] [15 regression] ICE when building embree-4.3.1 on amd64

2024-07-12 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115785 Richard Sandiford changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug target/115881] [15 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1934 with -O2 -mx32 -maddress-mode=long

2024-07-12 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115881 Richard Sandiford changed: What|Removed |Added Assignee|rsandifo at gcc dot gnu.org|unassigned at gcc dot

[Bug target/115881] [15 Regression] ICE: RTL check: expected code 'reg', have 'subreg' in rhs_regno, at rtl.h:1934 with -O2 -mx32 -maddress-mode=long

2024-07-11 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115881 Richard Sandiford changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org

[Bug rtl-optimization/115782] [15 Regression] ICE on valid code at -O{2,3} with "-fno-guess-branch-probability -fgcse-sm -fno-expensive-optimizations -fno-gcse" on x86_64-linux-gnu: in possibly_queue_

2024-07-11 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115782 Richard Sandiford changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug rtl-optimization/115785] ICE when building embree-4.3.1 on amd64 with -flate-combine-instructions

2024-07-10 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115785 --- Comment #2 from Richard Sandiford --- The patch in #c1 is just part 1. Part 2 will fix the bug.

[Bug ipa/114531] Feature proposal for an `-finline-functions-aggressive` compiler option

2024-07-08 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114531 --- Comment #20 from Richard Sandiford --- (In reply to Jan Hubicka from comment #18) > I am trying to understand how useful this is. I am basically worried > about two things > 1) we have other optimization passes that behave differently at -

[Bug rtl-optimization/115785] ICE when building embree-4.3.1 on amd64 with -flate-combine-instructions

2024-07-05 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org Ever confirmed|0 |1 Last reconfirmed||2024-07-05

[Bug rtl-optimization/115782] ICE on valid code at -O{2,3} with "-fno-guess-branch-probability -fgcse-sm -fno-expensive-optimizations -fno-gcse" on x86_64-linux-gnu: in possibly_queue_changes, at rtl-

2024-07-05 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
|UNCONFIRMED |ASSIGNED Ever confirmed|0 |1 Assignee|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org --- Comment #1 from Richard Sandiford --- I'll take a look.

[Bug tree-optimization/115629] Inefficient if-convert of masked conditionals

2024-07-02 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115629 Richard Sandiford changed: What|Removed |Added CC||rsandifo at gcc dot gnu.org

[Bug rtl-optimization/115677] ICE when building argon2 with -flate-combine-instructions on amd64

2024-06-27 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115677 Richard Sandiford changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug rtl-optimization/115677] ICE when building argon2 with -flate-combine-instructions on amd64

2024-06-27 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115677 Richard Sandiford changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |rsandifo at gcc dot gnu.org

[Bug target/115634] [15 regression] s390 bootstrap failure since r15-1579-g792f97b44ffc5e

2024-06-25 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115634 --- Comment #3 from Richard Sandiford --- Yeah, I agree that sounds like the right fix. Specifically, I assume s390_decompose_addrstyle_without_index, when doing: if (op && GET_CODE (op) != REG) return false; should check whether the re

[Bug ipa/114531] Feature proposal for an `-finline-functions-aggressive` compiler option

2024-06-25 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114531 --- Comment #17 from Richard Sandiford --- I can see that it's useful to ask whether the current -O2 & -O3 inlining heuristics are making the right trade-off. But I think that's really a different issue from the one that is raised in the PR. (

[Bug target/115631] [15 Regression] GCN: [-PASS:-]{+FAIL:+} c-c++-common/torture/builtin-arith-overflow-6.c -O2 execution test

2024-06-25 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115631 --- Comment #4 from Richard Sandiford --- Created attachment 58513 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=58513&action=edit A patch for a bug seen on arm*-*-* Also, could you check whether the attached patch makes any difference?

[Bug target/115631] [15 Regression] GCN: [-PASS:-]{+FAIL:+} c-c++-common/torture/builtin-arith-overflow-6.c -O2 execution test

2024-06-25 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115631 --- Comment #3 from Richard Sandiford --- I've now pushed a debug counter for late_combine. Sorry to ask, but could you bisect on N in -fdbg-cnt=late_combine:N to see which transformation is causing the problem?

[Bug target/115633] [15 Regression] powerpc64le: "relocation truncated to fit: R_PPC64_TOC16 against `.rodata.cst4'" with (default) '-flate-combine-instructions'

2024-06-25 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115633 --- Comment #2 from Richard Sandiford --- -flate-combine-instructions is supposed to be disabled by default for all powerpc targets. Could you look at why that isn't the case for you?

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