[Bug target/103316] PowerPC: Gimple folding of int128 comparisons produces suboptimal code

2021-11-19 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103316 --- Comment #13 from Segher Boessenkool --- (In reply to Bill Schmidt from comment #11) > As I mentioned privately, we could do with an audit of our implementation of > standard patterns in general, since we tend to find such missing cases

[Bug target/103316] PowerPC: Gimple folding of int128 comparisons produces suboptimal code

2021-11-19 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103316 --- Comment #12 from Segher Boessenkool --- When is the lowering done currently? Only for the ops that have no other way of doing, and things are merged back to an __int128 immediately after that? If that is what is going on, then that is

[Bug target/103316] PowerPC: Gimple folding of int128 comparisons produces suboptimal code

2021-11-19 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103316 --- Comment #9 from Segher Boessenkool --- (In reply to Richard Biener from comment #7) > > I still think it would be best if Gimple did *never* split data. It > > simply does not know enough about the machine and what the eventual > > machine

[Bug target/103316] PowerPC: Gimple folding of int128 comparisons produces suboptimal code

2021-11-19 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103316 --- Comment #8 from Segher Boessenkool --- Btw: > mfvsrd 9,34 > mfvsrld 8,34 > mfvsrd 11,35 > mfvsrld 10,35 > li 7,1 > cmpd 0,9,11 > bgt 0,.L2 > cmpld 0,9,11 > beq 0,.L5 > .L3: > li

[Bug target/103316] PowerPC: Gimple folding of int128 comparisons produces suboptimal code

2021-11-19 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103316 --- Comment #6 from Segher Boessenkool --- Ah, now I see. Thanks! Power10 has some new 128-bit insns (and p9 and p8 did before, too). I still think it would be best if Gimple did *never* split data. It simply does not know enough about the

[Bug target/103316] PowerPC: Gimple folding of int128 comparisons produces suboptimal code

2021-11-19 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103316 --- Comment #2 from Segher Boessenkool --- Do you maybe have some simple example (of what we generate, and what you say it should be)?

[Bug target/103197] ppc inline expansion of memcpy/memmove should not use lxsibzx/stxsibx for a single byte

2021-11-18 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103197 --- Comment #8 from Segher Boessenkool --- So it seems to think that all registers in the preferred class, GEN_OR_VSX_REGS, are the same cost? They very much are not :-(

[Bug target/103197] ppc inline expansion of memcpy/memmove should not use lxsibzx/stxsibx for a single byte

2021-11-17 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103197 --- Comment #6 from Segher Boessenkool --- Not only is this a missed-optimization, it also is a regression (in GCC 10 already). It seems like the root cause here may be the same as in PR102169.

[Bug sanitizer/103251] TSAN warnings print pid

2021-11-16 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103251 --- Comment #2 from Segher Boessenkool --- It makes results not reproducable. It is a bug in the test. It is good to have the pid in the testcase output somewhere of course, just not in the summary.

[Bug sanitizer/103251] New: TSAN warnings print pid

2021-11-15 Thread segher at gcc dot gnu.org via Gcc-bugs
Assignee: unassigned at gcc dot gnu.org Reporter: segher at gcc dot gnu.org CC: dodji at gcc dot gnu.org, dvyukov at gcc dot gnu.org, jakub at gcc dot gnu.org, kcc at gcc dot gnu.org, marxin at gcc dot gnu.org Target Milestone: --- TSAN testsuite

[Bug c++/87656] Useful flags to enable with -Wall or -Wextra

2021-11-14 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87656 --- Comment #9 from Segher Boessenkool --- (In reply to Eric Gallager from comment #8) > Any reason not to put -Wnested-externs in -Wall or -Wextra? It warns for any "extern" declaration in other than file scope. This is completely standard C,

[Bug target/103197] ppc inline expansion of memcpy/memmove should not use lxsibzx/stxsibx for a single byte

2021-11-12 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103197 Segher Boessenkool changed: What|Removed |Added Last reconfirmed||2021-11-12

[Bug testsuite/103051] [12 regression] new test case gcc.dg/vect/tsvc/vect-tsvc-s112.c fails in r12-4840

2021-11-11 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103051 --- Comment #10 from Segher Boessenkool --- (In reply to Martin Liška from comment #9) > All right, so something like this should work, right? > > diff --git a/gcc/testsuite/gcc.dg/vect/tsvc/vect-tsvc-s112.c >

[Bug libgcc/103004] [12 regression] r12-4416 breaks backtrace on PPC64 Big-endian

2021-11-11 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103004 Segher Boessenkool changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug libgcc/103004] [12 regression] r12-4416 breaks backtrace on PPC64 Big-endian

2021-11-11 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103004 --- Comment #5 from Segher Boessenkool --- Bah, I typoed the PR id: commit 8d71d3a317236ab4a69f441cf867a43aeb448150 Author: Raphael Moreira Zinsly Date: Thu Nov 11 11:40:10 2021 -0300 libgcc: Fix backtrace fallback on PowerPC

[Bug testsuite/103051] [12 regression] new test case gcc.dg/vect/tsvc/vect-tsvc-s112.c fails in r12-4840

2021-11-10 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103051 --- Comment #8 from Segher Boessenkool --- Note that the -mcpu= in use can be set by compiler defaults as well (which can be set at build time, --with-cpu=), or commonly in RUNTESTFLAGS (to test a bunch of different -mcpu= settings at the same

[Bug testsuite/103051] [12 regression] new test case gcc.dg/vect/tsvc/vect-tsvc-s112.c fails in r12-4840

2021-11-10 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103051 --- Comment #7 from Segher Boessenkool --- (In reply to Martin Liška from comment #4) > Shouldn't the function check_effective_target_has_arch_pwr7 pass > -mcpu=native? No. It checks if the effective target (set by options elsewhere!) is

[Bug target/103124] PPC: "mr" instruction is unnecessary when extending DI to V1TI

2021-11-09 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103124 Segher Boessenkool changed: What|Removed |Added Last reconfirmed||2021-11-10 Ever confirmed|0

[Bug target/93453] PPC: rldimi not taken into account to avoid shift+or

2021-11-09 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93453 --- Comment #3 from Segher Boessenkool --- Splitters run after all RTL transforms, so anything that can be done on the split result has to be done manually. This does not scale. Splitters are not suitable for this kind of thing. You can do

[Bug target/101324] powerpc64le: hashst appears before mflr at -O1 or higher

2021-10-26 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101324 --- Comment #15 from Segher Boessenkool --- (In reply to Peter Bergner from comment #14) > (In reply to Martin Liška from comment #13) > > Created attachment 51668 [details] > > Patch candidate > > > > Please test the patch on a power10

[Bug other/102440] Uinteger Opt/Param but the underlying type is signed

2021-10-26 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102440 --- Comment #9 from Segher Boessenkool --- (In reply to Martin Liška from comment #8) > > We could make the "UInteger" type mean it is implemented with an "unsigned > > int" > > C type (or some other unsigned integer type). > > This would lead

[Bug libffi/102923] [12 Regression] powerpc64 (BE) linux all languages bootstrap broken after libffi 3.4.2 import.

2021-10-25 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102923 --- Comment #8 from Segher Boessenkool --- Created attachment 51664 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=51664=edit proposed patch This is the patcgh I am currently testing.

[Bug other/102440] Uinteger Opt/Param but the underlying type is signed

2021-10-25 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102440 --- Comment #7 from Segher Boessenkool --- The documentation for UInteger also says Positive values of the argument in excess of @code{INT_MAX} wrap around zero. so C "unsigned" types are natural for it.

[Bug other/102440] Uinteger Opt/Param but the underlying type is signed

2021-10-25 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102440 --- Comment #6 from Segher Boessenkool --- (In reply to Martin Liška from comment #5) > All right, so the meaning of the UInteger type is actually that users can't > set the flag/param to a negative value: > > $ gcc -fabi-version=-3 a.c > gcc:

[Bug libffi/102923] [12 Regression] powerpc64 (BE) linux all languages bootstrap broken after libffi 3.4.2 import.

2021-10-25 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102923 --- Comment #4 from Segher Boessenkool --- (In reply to Jakub Jelinek from comment #1) > The stvx stuff is guarded by #ifdef __VEC__, so perhaps the lvx stuff should > be too, or there should be .machine push; .machine power7; ... .machine pop;

[Bug target/102783] [powerpc] FPSCR manipulations cannot be relied upon

2021-10-19 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102783 --- Comment #8 from Segher Boessenkool --- (In reply to jos...@codesourcery.com from comment #6) > Generically (and if the command-line options are such that floating-point > control / status bits are to be respected by optimizations), *any*

[Bug target/102783] [powerpc] FPSCR manipulations cannot be relied upon

2021-10-19 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102783 --- Comment #7 from Segher Boessenkool --- (In reply to Richard Biener from comment #5) > Even out-of-line does not help if there are visible CSE/association > opportunities across such call. Yeah, good point. > A workaround is to make the

[Bug target/102767] [12 Regression] ICE in rs6000_builtin_vectorization_cost, at config/rs6000/rs6000.c:5216

2021-10-16 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102767 --- Comment #6 from Segher Boessenkool --- (In reply to Richard Earnshaw from comment #5) > We have the type > type size > unit-size > and movmisalign pattern is enabled for this. > > but the vectorization cost doesn't

[Bug target/102783] [powerpc] FPSCR manipulations cannot be relied upon

2021-10-15 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102783 Segher Boessenkool changed: What|Removed |Added Last reconfirmed||2021-10-15 Ever confirmed|0

[Bug target/101104] test case gcc.c-torture/execute/ieee/cdivchkld.c fails

2021-10-06 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101104 --- Comment #14 from Segher Boessenkool --- (In reply to Patrick McGehearty from comment #13) > I may be mistaken about the source of the issue being glibc. > Perhaps it is a system include file issue? Here are some > more details. > > Here

[Bug target/101104] test case gcc.c-torture/execute/ieee/cdivchkld.c fails

2021-10-06 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101104 --- Comment #12 from Segher Boessenkool --- (In reply to Patrick McGehearty from comment #8) > My challenge is that the very old glibc on gcc135.fsffrance.org > does not know about _TF_ vs _KF_ and _IF_. It refused to > build the new

[Bug target/102485] -Wa,-many no longer has any effect

2021-10-05 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102485 --- Comment #5 from Segher Boessenkool --- (In reply to Peter Bergner from comment #4) > (In reply to Segher Boessenkool from comment #3) > > (In reply to Paul Clarke from comment #2) > > > "-many" is supposed to make those black boxes just

[Bug target/102485] -Wa,-many no longer has any effect

2021-10-05 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102485 --- Comment #3 from Segher Boessenkool --- (In reply to Paul Clarke from comment #2) > GCC putting the base ".machine" directive at the beginning of the file makes > any command-line use of "-many" (-Wa,-many) be ignored. Is that OK? If

[Bug target/85730] complex code for modifying lowest byte in a 4-byte vector

2021-10-04 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85730 --- Comment #7 from Segher Boessenkool --- (In reply to Richard Biener from comment #5) > Not sure whether targets should have a special-case pattern here or whether > that's for combine to un-canonicalize it? Is the shift defined anywhere as

[Bug target/102169] powerpc64 int memory operations using FP instructions

2021-09-28 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102169 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug c/94428] Reintroduce -Wzero-length-array

2021-09-24 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94428 --- Comment #3 from Segher Boessenkool --- (In reply to Martin Sebor from comment #1) > With the introduction of -Wzero-length-bounds in GCC 10 (which, > incidentally, was added specifically to ease the adoption of the stricter > array bounds

[Bug target/102140] [12 Regression] ICE: in extract_constrain_insn, at recog.c:2670 (insn does not satisfy its constraints) with -Og -fipa-cp -fno-tree-ccp -fno-tree-ter

2021-09-23 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102140 --- Comment #4 from Segher Boessenkool --- Confirmed. Doesn't need -mlittle or -mabi=elfv2, or -mcpu=power8 even, but does need -mvsx.

[Bug target/102107] protocol register (r12) corrupted before a tail call

2021-09-21 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102107 --- Comment #22 from Segher Boessenkool --- Backported to 11 and 10. Not doing GCC 9; the problem is older than that, and the backport wouldn't be completely trivial. Paul, please close if everything is okay now?

[Bug rtl-optimization/102306] [9/10/11/12 Regression] Volatile pointer dereferenced twice

2021-09-14 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102306 --- Comment #8 from Segher Boessenkool --- The patch in c#5 looks good. Since you test added_sets_0 and added_sets_1 as well, does this mean it could happen before this patch as well? We already did have some things that did combine 2->2 (via

[Bug rtl-optimization/102306] [9/10/11/12 Regression] Volatile pointer dereferenced twice

2021-09-14 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102306 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug c/85185] Wider-than-expected load for struct member used as operand of inline-asm with memory clobber at -Og

2021-09-14 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85185 --- Comment #12 from Segher Boessenkool --- (In reply to Andrew Pinski from comment #11) > as mentioned in another bug, this is more of a documentation issue and the > internal details on how inline-asm works. Yup. I suggest we advice to

[Bug target/102154] [12 Regression] ICE in extract_insn, at recog.c:2769 since r12-3277-gd2874d905647a1d146dafa60199d440e837adc4d

2021-09-10 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102154 --- Comment #27 from Segher Boessenkool --- (In reply to Hongtao.liu from comment #22) > > Btw, I think this is a subreg that would be reasonable to handle. > > It's exactly the kind that x86 would like to allow, (subreg:HF (reg:SI > > ..) 0).

[Bug target/102154] [12 Regression] ICE in extract_insn, at recog.c:2769 since r12-3277-gd2874d905647a1d146dafa60199d440e837adc4d

2021-09-10 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102154 --- Comment #26 from Segher Boessenkool --- (In reply to rguent...@suse.de from comment #24) > > The expander should never create such code in the first place, it is > > premature > > optimisation! At expand time this should be separate

[Bug target/102154] [12 Regression] ICE in extract_insn, at recog.c:2769 since r12-3277-gd2874d905647a1d146dafa60199d440e837adc4d

2021-09-10 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102154 --- Comment #23 from Segher Boessenkool --- (In reply to rguent...@suse.de from comment #21) > > /home/seurer/gcc/git/gcc-test/libgo/go/strconv/atof.go:704:1: error: > > unrecognizable insn: > > 704 | func parseFloatPrefix(s string, bitSize

[Bug target/102211] [12 regression] ICE introduced by r12-3277

2021-09-09 Thread segher at gcc dot gnu.org via Gcc-bugs
, ||segher at gcc dot gnu.org --- Comment #6 from Segher Boessenkool --- (In reply to Jim Wilson from comment #4) > Yes, moving SI/DI values to FP regs is OK. However, RISC-V requires that FP > values in FP registers be stored NaN-boxed. So an SFmode

[Bug target/102154] [12 Regression] ICE in extract_insn, at recog.c:2769 since r12-3277-gd2874d905647a1d146dafa60199d440e837adc4d

2021-09-09 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102154 --- Comment #20 from Segher Boessenkool --- (In reply to rguent...@suse.de from comment #18) > So I wonder if it makes sense to allow lowpart subregs of any mode when > the inner mode is integer. We really really really should make a separate

[Bug target/102239] powerpc suboptimal boolean test of contiguous bits

2021-09-09 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102239 Segher Boessenkool changed: What|Removed |Added Last reconfirmed||2021-09-09 Ever confirmed|0

[Bug target/102154] [12 Regression] ICE in extract_insn, at recog.c:2769 since r12-3277-gd2874d905647a1d146dafa60199d440e837adc4d

2021-09-08 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102154 --- Comment #17 from Segher Boessenkool --- (In reply to Hongtao.liu from comment #15) > as discussed in > https://gcc.gnu.org/pipermail/gcc-patches/2021-August/578437.html, allow > specific float-int subreg seems weird. Indiscriminately

[Bug target/97142] __builtin_fmod not optimized on POWER

2021-09-07 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97142 --- Comment #19 from Segher Boessenkool --- (In reply to Peter Bergner from comment #17) > The Version about is to 10.2, does that mean we're going to back port this > to the release branches, or are we calling it good with trunk? This is a

[Bug target/97142] __builtin_fmod not optimized on POWER

2021-09-07 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97142 --- Comment #18 from Segher Boessenkool --- +/* { dg-final { scan-assembler-not {(?n)\mb.*fmod} } } */ +/* { dg-final { scan-assembler-not {(?n)\mb.*fmodf} } } */ +/* { dg-final { scan-assembler-not {(?n)\mb.*remainder} } } */ +/* { dg-final {

[Bug target/65584] [i386] Intrinsics inclusion with `-nostdinc' failing due to `stdlib.h' dependency

2021-09-07 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65584 --- Comment #7 from Segher Boessenkool --- (In reply to Jakub Jelinek from comment #6) > And the "somehow" is now possible too, we can use __has_include(). Including it with -ffreestanding in effect is always wrong. Even if the header exists

[Bug target/65584] [i386] Intrinsics inclusion with `-nostdinc' failing due to `stdlib.h' dependency

2021-09-07 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65584 --- Comment #4 from Segher Boessenkool --- Since you closed PR102231 (which has a lot more detail), let me paste that here: includes unconditionally Instead, it should do something like #if __STDC_HOSTED__ #include #endif as Clang

[Bug target/65584] [i386] Intrinsics inclusion with `-nostdinc' failing due to `stdlib.h' dependency

2021-09-07 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65584 Segher Boessenkool changed: What|Removed |Added Ever confirmed|0 |1 Last reconfirmed|

[Bug target/102231] New: includes unconditionally

2021-09-07 Thread segher at gcc dot gnu.org via Gcc-bugs
Assignee: unassigned at gcc dot gnu.org Reporter: segher at gcc dot gnu.org Target Milestone: --- Instead, it should do something like #if __STDC_HOSTED__ #include #endif as Clang does, because only exists on hosted environments (which is good, because it itself uses , etc

[Bug target/102107] protocol register (r12) corrupted before a tail call

2021-09-03 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102107 --- Comment #16 from Segher Boessenkool --- (Hopefully) fixed on trunk, but it needs backports.

[Bug target/96791] ICE in convert_mode_scalar, at expr.c:412

2021-09-02 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96791 --- Comment #25 from Segher Boessenkool --- (In reply to Peter Bergner from comment #24) > (In reply to Segher Boessenkool from comment #23) > > Anyway, patch in testing. > > Did your patch fix the problem or do we need to take another run at

[Bug target/97142] __builtin_fmod not optimized on POWER

2021-09-02 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97142 --- Comment #14 from Segher Boessenkool --- (In reply to Peter Bergner from comment #13) > (In reply to luoxhu from comment #12) > > Patch submitted: > > > > https://gcc.gnu.org/pipermail/gcc-patches/2021-April/568143.html > > Looks like Will

[Bug target/102154] [12 Regression] ICE in extract_insn, at recog.c:2769 since r12-3277-gd2874d905647a1d146dafa60199d440e837adc4d

2021-09-02 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102154 --- Comment #14 from Segher Boessenkool --- (In reply to Jonathan Wakely from comment #13) > Is this also the cause of several libstdc++ FAILs on ppc64le? Yes. I have asked for reversion of g:d2874d905647:

[Bug target/102107] protocol register (r12) corrupted before a tail call

2021-09-01 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102107 Segher Boessenkool changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |segher at gcc dot gnu.org

[Bug target/102107] protocol register (r12) corrupted before a tail call

2021-08-31 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102107 --- Comment #13 from Segher Boessenkool --- /* If we need to save CR, put it into r12 or r11. Choose r12 except when r12 will be needed by out-of-line gpr save. */ cr_save_regno = ((DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2)

[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8

2021-08-31 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #16 from Segher Boessenkool --- (In reply to wschmidt from comment #14) > I disagree with that.  You should use __VSX__ && _ARCH_PWR9 to check for > P9 vector support, etc.  The __POWERn_VECTOR__ things really are not > great and

[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8

2021-08-31 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #15 from Segher Boessenkool --- (In reply to HaoChen Gui from comment #9) > For this example, let's suppose that we set mcpu=power8 and mno-vsx in the > command line. Thus, _ARCH_PWR8 should be defined as mcpu=power8. But if the >

[Bug target/102107] protocol register (r12) corrupted before a tail call

2021-08-31 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102107 Segher Boessenkool changed: What|Removed |Added Ever confirmed|0 |1 Last reconfirmed|

[Bug target/102107] protocol register (r12) corrupted before a tail call

2021-08-30 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102107 --- Comment #10 from Segher Boessenkool --- (In reply to Segher Boessenkool from comment #9) > So that is something older from the GCC 11 branch, aha. And I cannot reproduce it with anything that has been on the GCC 11 branch, either.

[Bug target/102107] protocol register (r12) corrupted before a tail call

2021-08-30 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102107 --- Comment #9 from Segher Boessenkool --- So that is something older from the GCC 11 branch, aha.

[Bug target/102107] protocol register (r12) corrupted before a tail call

2021-08-30 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102107 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug rtl-optimization/102062] powerpc suboptimal unrolling simple array sum

2021-08-30 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102062 --- Comment #15 from Segher Boessenkool --- This should be fixed now, please confirm. Thanks!

[Bug target/102127] [12 Regression] ICE when compiling (m32) powerpc/440-mulchw-1.c since g:ff6bb9dde10ab665a35bb75527313cd9f7d52f8e

2021-08-30 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102127 --- Comment #4 from Segher Boessenkool --- Program received signal SIGSEGV, Segmentation fault. 0x10f9b10c in ._Z19build_function_typeP9tree_nodeS0_ () (gdb) bt #0 0x10f9b10c in ._Z19build_function_typeP9tree_nodeS0_ () #1

[Bug middle-end/99299] Need a recoverable version of __builtin_trap()

2021-08-26 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99299 Segher Boessenkool changed: What|Removed |Added Status|RESOLVED|NEW Resolution|DUPLICATE

[Bug c/102062] powerpc suboptimal unrolling simple array sum

2021-08-25 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102062 --- Comment #12 from Segher Boessenkool --- We can backport Hao Chen's patch, it has proven to cause no problems at all. We don't normally backport patches that aren't bugfixes, but we could do it for important enough things (we did it for most

[Bug c/102062] powerpc suboptimal unrolling simple array sum

2021-08-25 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102062 --- Comment #9 from Segher Boessenkool --- Thanks for the detective work! So the variable expansion code could be improved to handle sign extensions better (or maybe zero extensions as well?) In either case that won't help rs6000 much anymore

[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8

2021-08-25 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #8 from Segher Boessenkool --- (In reply to HaoChen Gui from comment #6) > (In reply to Segher Boessenkool from comment #5) > > (In reply to HaoChen Gui from comment #4) > > > I wonder if it's a Power8 architecture when those 6

[Bug c/102062] powerpc suboptimal unrolling simple array sum

2021-08-25 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102062 --- Comment #7 from Segher Boessenkool --- Btw, -ftree-loop-vectorize -fvect-cost-model=cheap makes this 8 vectors per iteration (and very-cheap doesn't vectorise it). Maybe overkill, esp. when you look at the tail code, but that 8 vector core

[Bug c/102062] powerpc suboptimal unrolling simple array sum

2021-08-25 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102062 --- Comment #6 from Segher Boessenkool --- (In reply to Nicholas Piggin from comment #0) > I may be unaware of a constraint of C standard here, but maintaining the two > base addresses seems pointless, This is an ordering problem. The

[Bug target/102024] [12 Regression] zero width bitfields and ABIs

2021-08-24 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102024 --- Comment #9 from Segher Boessenkool --- (In reply to Michael Matz from comment #8) > So, I think, not removing those members from the FE makes sense, they contain > crucial information. Unfortunately that means that they need to be dealt >

[Bug testsuite/90381] New test case gcc.dg/tree-ssa/pr88676-2.c fails with its introduction in r270934

2021-08-24 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90381 --- Comment #6 from Segher Boessenkool --- (In reply to Andrew Pinski from comment #5) > (In reply to Segher Boessenkool from comment #4) > > Are bitfields allocated right to left on all LE configs? > > I think the majority of them, I have not

[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8

2021-08-24 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #5 from Segher Boessenkool --- (In reply to HaoChen Gui from comment #4) > I wonder if it's a Power8 architecture when those 6 options are all > disabled. Or it is regressed to Power7? The "_ARCH_PWR8" represents the > hardware

[Bug target/102024] [12 Regression] zero width bitfields and ABIs

2021-08-23 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102024 --- Comment #6 from Segher Boessenkool --- (In reply to Segher Boessenkool from comment #5) > "structure layout happens before the zero width bitfields are removed by the > FE". > > So, what can break still, then? Homogeneous aggregates can

[Bug target/102024] [12 Regression] zero width bitfields and ABIs

2021-08-23 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102024 --- Comment #5 from Segher Boessenkool --- "structure layout happens before the zero width bitfields are removed by the FE". So, what can break still, then? - li 9,0 - sldi 9,9,32 - mtvsrd 1,9 + li 3,0 std

[Bug target/101882] [9/10/11/12 Regression] modulus with input and output set to a hard register

2021-08-23 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882 --- Comment #5 from Segher Boessenkool --- (In reply to Jakub Jelinek from comment #4) > Started with r9-3950-g2f0b80c7a4ab4254f57ba63de26ebb7896e3742d > Does the modsw instruction really need the early-clobber (i.e. does it first > overwrite

[Bug middle-end/82940] Suboptimal code for (a & 0x7f) | (b & 0x80) on powerpc

2021-08-23 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82940 --- Comment #8 from Segher Boessenkool --- (In reply to Segher Boessenkool from comment #7) > (In reply to Peter Cordes from comment #6) > > # power64 GCC 9.2.1 (ATI13.0) > > rlwimi 3,4,0,255# bit-blend according to mask, rotate

[Bug middle-end/82940] Suboptimal code for (a & 0x7f) | (b & 0x80) on powerpc

2021-08-23 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82940 --- Comment #7 from Segher Boessenkool --- (In reply to Peter Cordes from comment #6) > # power64 GCC 9.2.1 (ATI13.0) > rlwimi 3,4,0,255# bit-blend according to mask, rotate count=0 > rldicl 3,3,0,32 # Is this

[Bug rtl-optimization/55549] zero_extend and vectors

2021-08-23 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55549 --- Comment #2 from Segher Boessenkool --- Three things: 1) It was invalid *before* this, already (vector mode paradoxical subregs make no sense); 2) The subreg needs to be fixed up *somehow*, too; 3) subreg of mem will go away any day now (or,

[Bug target/101882] modulus with input and output set to a hard register

2021-08-20 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101882 --- Comment #3 from Segher Boessenkool --- (In reply to Marek Polacek from comment #2) > Assignee present -> ASSIGNED. Hrm, this used to work automatically when you press "take"? What changed?

[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8

2021-08-18 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101865 --- Comment #3 from Segher Boessenkool --- The current code reads if ((flags & OPTION_MASK_DIRECT_MOVE) != 0) rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8"); if ((flags & OPTION_MASK_MODULO) != 0)

[Bug target/101893] New: There is no vgbbd on p7

2021-08-12 Thread segher at gcc dot gnu.org via Gcc-bugs
Assignee: unassigned at gcc dot gnu.org Reporter: segher at gcc dot gnu.org Target Milestone: --- FAIL: gcc.target/powerpc/sse4_1-phminposuw.c (test for excess errors) Excess errors: /home/segher/build/tot-master/gcc/include/smmintrin.h:103:3: error: AltiVec argument passed to unprototyped

[Bug target/101882] modulus with input and output set to a hard register

2021-08-12 Thread segher at gcc dot gnu.org via Gcc-bugs
|unassigned at gcc dot gnu.org |segher at gcc dot gnu.org Status|UNCONFIRMED |NEW Ever confirmed|0 |1 --- Comment #1 from Segher Boessenkool --- Confirmed. I'll take it.

[Bug target/101865] _ARCH_PWR8 is not defined when using -mcpu=power8

2021-08-11 Thread segher at gcc dot gnu.org via Gcc-bugs
|NEW CC||segher at gcc dot gnu.org Last reconfirmed||2021-08-11 --- Comment #1 from Segher Boessenkool --- Confirmed.

[Bug tree-optimization/101830] [12 Regression] Incorrect error messages beginning with r12-2591 (backward jump threader)

2021-08-09 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101830 --- Comment #4 from Segher Boessenkool --- (In reply to Bill Schmidt from comment #0) > (1) linebuf and pos are global variables, and the compiler cannot tell > whether or not there are problems with array bounds accesses here. Indeed, > pos is

[Bug middle-end/82940] Suboptimal code for (a & 0x7f) | (b & 0x80) on powerpc

2021-08-01 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82940 --- Comment #5 from Segher Boessenkool --- (In reply to Andrew Pinski from comment #4) > As long as nothing on the rtl level (combine) does not mess this up, it > should produce the best code. combine cannot ever create worse code than it had

[Bug tree-optimization/89847] Simplify subexpressions of % constant

2021-07-28 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89847 --- Comment #2 from Segher Boessenkool --- Interestingly, while this gives optimal code for power8 and power9, we still get an unnecessary mulli for power10. This is because multiplication by 31 is expanded to a multiplication on power10 (just

[Bug middle-end/78103] Failure to optimize with __builtin_clzl

2021-07-27 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78103 --- Comment #21 from Segher Boessenkool --- (In reply to Jakub Jelinek from comment #19) > Created attachment 51211 [details] > gcc12-pr78103.patch > > Updated untested patch that uses define_insn_and_split in 2 cases instead of > the combine

[Bug middle-end/78103] Failure to optimize with __builtin_clzl

2021-07-27 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78103 --- Comment #20 from Segher Boessenkool --- (In reply to Jakub Jelinek from comment #18) > (In reply to Segher Boessenkool from comment #17) > > > Nothing changes for combine though, I think it really would be nice if it > > > could either

[Bug middle-end/78103] Failure to optimize with __builtin_clzl

2021-07-27 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78103 --- Comment #17 from Segher Boessenkool --- (In reply to Jakub Jelinek from comment #16) > Created attachment 51209 [details] > gcc12-pr78103.patch > > Updated patch. This one fixes the reuse of a pseudo you've mentioned above, > and fixes

[Bug middle-end/78103] Failure to optimize with __builtin_clzl

2021-07-26 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78103 --- Comment #15 from Segher Boessenkool --- (In reply to Jakub Jelinek from comment #14) > (In reply to Segher Boessenkool from comment #13) > > (In reply to Jakub Jelinek from comment #10) > > > Unfortunately, it doesn't work for the #c0

[Bug middle-end/78103] Failure to optimize with __builtin_clzl

2021-07-26 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78103 --- Comment #13 from Segher Boessenkool --- (In reply to Jakub Jelinek from comment #10) > Unfortunately, it doesn't work for the #c0 testcase, after the combiner > splitter kicks in, the combiner doesn't even try that 4 insn combination. It

[Bug rtl-optimization/67382] RTL combiner is too eager to combine (plus (reg 92) (reg 92)) to (ashift (reg 92) (const_int 1))

2021-07-25 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67382 --- Comment #5 from Segher Boessenkool --- It turns out that noop other_insn is fine, and is accepted etc., but the resulting i3 in this case is not.

[Bug rtl-optimization/67382] RTL combiner is too eager to combine (plus (reg 92) (reg 92)) to (ashift (reg 92) (const_int 1))

2021-07-25 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67382 --- Comment #4 from Segher Boessenkool --- (In reply to Andrew Pinski from comment #3) > Note combine is able to figure out the jump is unconditional but there is no > "pattern" to match it: > Trying 10 -> 17: >10: r85:QI=0x1 >17:

[Bug target/101393] PowerPC32 inline assembly broken by commit 2d94f7dea9c73ef3c116a0ddc722724578a860fe

2021-07-22 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101393 --- Comment #17 from Segher Boessenkool --- (In reply to Franz Sirl from comment #15) > > "7400" and "403" are not supported target attribute values, fwiw (says the > > manual). > > Hmm, I don't understand what you mean. I mean that I cannot

[Bug target/101393] PowerPC32 inline assembly broken by commit 2d94f7dea9c73ef3c116a0ddc722724578a860fe

2021-07-22 Thread segher at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101393 --- Comment #14 from Segher Boessenkool --- (In reply to Franz Sirl from comment #12) > The emitted .machine is easy to fix, what's not so easy to fix is the > intention behind Segher's change that caused the wrong .machine. > > Consider this

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