https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86520
--- Comment #8 from Stephen Warren ---
Great, thanks for all the explanations. Makes perfect sense.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86520
--- Comment #6 from Stephen Warren ---
> Note that library code also assumes that misaligned accesses are safe:
> that is the default for AArch64.
I assume you're talking about gcc's default, not any architectural default? The
ARMv8 ARM states t
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86520
Stephen Warren changed:
What|Removed |Added
Resolution|INVALID |FIXED
--- Comment #4 from Stephen Warre
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: swarren at nvidia dot com
Target Milestone: ---
When compiling for AArch64 (64-bit ARM), the following code:
void func(char *str)
{
*str = '0';
str++;
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: swarren at nvidia dot com
Created attachment 32771
--> http://gcc.gnu.org/bugzilla/attachment.cgi?id=32771&action=edit
Source sample that exhibits the issue when compiled
When running gcc 4.8 for ARM with -
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52060
--- Comment #2 from Stephen Warren 2012-01-30
23:16:11 UTC ---
gcc-4.5.3 appears unaffected.
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52060
--- Comment #1 from Stephen Warren 2012-01-30
22:47:27 UTC ---
gcc-linaro 2012.01 has the same issue, although the code it generated was a
little different.
gcc-4.7 snapshot 20120128 appears to have the same issue.
(I couldn't build the whole 4
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52060
Bug #: 52060
Summary: Incorrect mask/and (ARM "bic") instruction generated
for shifted expression parameter, triggered by -O2
-finline-functions
Classification: Unclassified
