[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx

2018-05-14 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85769 --- Comment #2 from Tamar Christina --- It's not r250673, That was committed 2017-07-28 and a GCC built 2017-08-17 does the correct thing for non-Armv8.2-a. It promotes the fp16 values to 32 bits does the operations and converts them back to fp16

[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx

2018-05-14 Thread tnfchris at gcc dot gnu.org
|unassigned at gcc dot gnu.org |tnfchris at gcc dot gnu.org

[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx

2018-05-21 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85769 --- Comment #4 from Tamar Christina --- I have a patch to add the missing case, but that'll just mask the reload bug, so I'm holding up on posting it while looking at reload.

[Bug driver/86030] New: specs file processing does not create response files for input directories

2018-06-01 Thread tnfchris at gcc dot gnu.org
: normal Priority: P3 Component: driver Assignee: unassigned at gcc dot gnu.org Reporter: tnfchris at gcc dot gnu.org Target Milestone: --- Target: mingw32 Similar to #45157 and #45749, GCC does not use response files for %D and %I handling (see

[Bug driver/86030] specs file processing does not create response files for input directories

2018-06-14 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86030 Tamar Christina changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/85769] [8/9 Regression] ICE in extract_constrain_insn, at recog.c:2205 for -mcpu=thunderx

2018-06-27 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85769 --- Comment #5 from Tamar Christina --- Author: tnfchris Date: Wed Jun 27 08:08:48 2018 New Revision: 262178 URL: https://gcc.gnu.org/viewcvs?rev=262178&root=gcc&view=rev Log: Add SIMD to REG pattern for movhf without armv8.2-a support for AArch

[Bug driver/86030] specs file processing does not create response files for input directories

2018-07-02 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86030 Tamar Christina changed: What|Removed |Added Status|RESOLVED|NEW Last reconfirmed|

[Bug driver/86030] specs file processing does not create response files for input directories

2018-07-02 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86030 --- Comment #3 from Tamar Christina --- Hmm according to 45749 with `HAVE_GNU_LD` on it should work for the ld call. I will give that a try. But the environment variable one is still an issue as far as I can tell.

[Bug target/84711] AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.

2018-07-05 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84711 --- Comment #12 from Tamar Christina --- Author: tnfchris Date: Thu Jul 5 10:35:00 2018 New Revision: 262435 URL: https://gcc.gnu.org/viewcvs?rev=262435&root=gcc&view=rev Log: Correct subreg no-op handling for big-endian vec_select. gcc/

[Bug target/84711] AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.

2018-07-05 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84711 --- Comment #13 from Tamar Christina --- Author: tnfchris Date: Thu Jul 5 10:37:36 2018 New Revision: 262436 URL: https://gcc.gnu.org/viewcvs?rev=262436&root=gcc&view=rev Log: Fix can_change_mode_class for big-endian on Arm gcc/ PR ta

[Bug target/84711] AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.

2018-07-06 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84711 --- Comment #14 from Tamar Christina --- Author: tnfchris Date: Fri Jul 6 10:44:35 2018 New Revision: 262472 URL: https://gcc.gnu.org/viewcvs?rev=262472&root=gcc&view=rev Log: Require sse for testcase on i686. PR target/84711 *

[Bug other/86486] GCC 8 stack clash protection on AArch64 is incomplete

2018-07-11 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86486 Tamar Christina changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug other/86486] New: GCC 8 stack clash protection on AArch64 is incomplete

2018-07-11 Thread tnfchris at gcc dot gnu.org
Component: other Assignee: tnfchris at gcc dot gnu.org Reporter: tnfchris at gcc dot gnu.org Target Milestone: --- Target: aarch64*-*-* * Currently enabling stack clash will only provide protection from alloca and not from prologue and epilogue code. This is not

[Bug middle-end/86640] [8/9 regression] ICE in combine

2018-07-26 Thread tnfchris at gcc dot gnu.org
||tnfchris at gcc dot gnu.org Assignee|unassigned at gcc dot gnu.org |tnfchris at gcc dot gnu.org

[Bug middle-end/86640] [8/9 regression] ICE in combine

2018-07-26 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86640 Tamar Christina changed: What|Removed |Added Last reconfirmed|2018-07-26 00:00:00 |2018-07-23 0:00 --- Comment #5 from Ta

[Bug middle-end/86640] [8/9 regression] ICE in combine

2018-07-27 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86640 --- Comment #9 from Tamar Christina --- That does seem to fix the issue, and I think it's also correct, I'm running a regression test and boostrap over the weekend for it. Will post the results on monday. thanks!

[Bug middle-end/86640] [8/9 regression] ICE in combine

2018-07-30 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86640 --- Comment #10 from Tamar Christina --- Hi Segher, bootstrap is ok and I found no regressions testing testing a softfp and hard configuration.

[Bug target/84711] AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.

2018-08-16 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84711 --- Comment #17 from Tamar Christina --- Author: tnfchris Date: Thu Aug 16 10:39:13 2018 New Revision: 263584 URL: https://gcc.gnu.org/viewcvs?rev=263584&root=gcc&view=rev Log: Update fall through pattern for FP16 patterns in ARM. The original

[Bug target/86640] [8/9 regression] ICE in combine

2018-08-16 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86640 --- Comment #13 from Tamar Christina --- Author: tnfchris Date: Thu Aug 16 14:32:18 2018 New Revision: 263589 URL: https://gcc.gnu.org/viewcvs?rev=263589&root=gcc&view=rev Log: Backporting two Arm fixes from mainline fixing PR86640 gcc/testsui

[Bug target/86640] [8/9 regression] ICE in combine

2018-08-16 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86640 Tamar Christina changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2017-11-17 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 --- Comment #10 from Tamar Christina --- Author: tnfchris Date: Fri Nov 17 15:53:51 2017 New Revision: 254878 URL: https://gcc.gnu.org/viewcvs?rev=254878&root=gcc&view=rev Log: 2017-11-17 Tamar Christina PR target/82641 * con

[Bug target/82066] #pragma GCC target documentation does not say it is implemented for aarch64

2017-11-27 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82066 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org

[Bug target/58693] GCC aarch64 arm_neon.h missing intrinsics from ACLE 2.0

2017-11-27 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58693 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org

[Bug target/58693] GCC aarch64 arm_neon.h missing intrinsics from ACLE 2.0

2017-11-27 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58693 --- Comment #6 from Tamar Christina --- Sorry, I phrased it incorrectly, I meant to say, bug #71233 should supersede this one. As in deed it has more details and is more up to date.

[Bug target/71233] [ARM, AArch64] missing AdvSIMD intrinsics

2017-11-27 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71233 Tamar Christina changed: What|Removed |Added CC||lennox at cs dot columbia.edu --- Comm

[Bug target/58693] GCC aarch64 arm_neon.h missing intrinsics from ACLE 2.0

2017-11-27 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58693 Tamar Christina changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2017-12-07 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 --- Comment #11 from Tamar Christina --- Author: tnfchris Date: Thu Dec 7 14:54:22 2017 New Revision: 255468 URL: https://gcc.gnu.org/viewcvs?rev=255468&root=gcc&view=rev Log: 2017-12-07 Tamar Christina PR target/82641 * con

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2017-12-07 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 Tamar Christina changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2018-01-09 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 --- Comment #13 from Tamar Christina --- Author: tnfchris Date: Tue Jan 9 11:04:50 2018 New Revision: 256375 URL: https://gcc.gnu.org/viewcvs?rev=256375&root=gcc&view=rev Log: 2018-01-09 Tamar Christina PR

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2018-01-30 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 --- Comment #15 from Tamar Christina --- Hi Arnd, What's the original error you're seeing without using the pragma? That should have worked fine still. I wasn't able to reproduce the failure using the default flags to the compiler, are you by

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2018-01-30 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 --- Comment #17 from Tamar Christina --- Ah!, thanks for that repro. I see what's changed. I'll work on a fix.

[Bug target/84129] New: GCC on AArch32 no longer compiles files which change architectures using in-line assembly.

2018-01-30 Thread tnfchris at gcc dot gnu.org
Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: tnfchris at gcc dot gnu.org CC: arnd at linaro dot org Target Milestone: --- Target: arm*-*-* Commit r255468 broke compilation on

[Bug target/84129] GCC on AArch32 no longer compiles files which change architectures using in-line assembly.

2018-01-30 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84129 Tamar Christina changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2018-01-30 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 --- Comment #21 from Tamar Christina --- I'll make the compiler not emit the warning so it shouldn't fail anymore. To answer your question about the pragma > and presumably would lead to the while file being built for armv5te, > possibly generat

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2018-01-30 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 --- Comment #22 from Tamar Christina --- ACLE macros nor pragma.

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2018-01-31 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 --- Comment #24 from Tamar Christina --- Do you have a repro for this one? compiling the kernel with `CFLAGS="march=-armv4t"` doesn't seem to reproduce the original issue. But the scenario should be working without needing to separate out the fu

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2018-02-06 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 --- Comment #28 from Tamar Christina --- Author: tnfchris Date: Tue Feb 6 11:20:55 2018 New Revision: 257410 URL: https://gcc.gnu.org/viewcvs?rev=257410&root=gcc&view=rev Log: 2018-02-06 Tamar Christina PR target/82641 * con

[Bug other/78196] [7 Regression] GCC self-test breaks native Windows builds

2016-11-03 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78196 tnfchris at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last

[Bug other/78196] [7 Regression] GCC self-test breaks native Windows builds

2016-11-03 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78196 --- Comment #1 from tnfchris at gcc dot gnu.org --- Just to clarify, I mean the native Windows x86 build.

[Bug driver/78196] [7 Regression] GCC self-test breaks native Windows x86 builds

2016-11-03 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78196 --- Comment #3 from tnfchris at gcc dot gnu.org --- There's actually a very simple fix for this :) I should be able to post it tomorrow! Regressions are running now so I can.

[Bug driver/78196] [7 Regression] GCC self-test breaks native Windows x86 builds

2016-11-07 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78196 --- Comment #4 from tnfchris at gcc dot gnu.org --- Author: tnfchris Date: Mon Nov 7 09:17:55 2016 New Revision: 241895 URL: https://gcc.gnu.org/viewcvs?rev=241895&root=gcc&view=rev Log: Fix the Windows native x86-64 build. P

[Bug driver/78196] [7 Regression] GCC self-test breaks native Windows x86 builds

2016-11-07 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78196 tnfchris at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED

[Bug testsuite/78136] gcc.dg/cpp/trad/include.c fails with newer glibc versions

2016-11-16 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78136 --- Comment #3 from tnfchris at gcc dot gnu.org --- Author: tnfchris Date: Wed Nov 16 15:53:08 2016 New Revision: 242500 URL: https://gcc.gnu.org/viewcvs?rev=242500&root=gcc&view=rev Log: Fix test names for trad.exp tests PR t

[Bug middle-end/78142] Commit r241590 is more registers to be used for on gcc.target/aarch64/vector_initialization_nostack.c

2017-01-12 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78142 tnfchris at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED

[Bug middle-end/19706] Recognize common Fortran usages of copysign.

2017-08-23 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19706 --- Comment #6 from Tamar Christina --- Author: tnfchris Date: Wed Aug 23 11:32:47 2017 New Revision: 251303 URL: https://gcc.gnu.org/viewcvs?rev=251303&root=gcc&view=rev Log: 2017-08-23 Tamar Christina PR middle-end/19706 *

[Bug middle-end/19706] Recognize common Fortran usages of copysign.

2017-08-23 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19706 --- Comment #7 from Tamar Christina --- Author: tnfchris Date: Wed Aug 23 11:34:59 2017 New Revision: 251304 URL: https://gcc.gnu.org/viewcvs?rev=251304&root=gcc&view=rev Log: 2017-08-23 Tamar Christina PR middle-end/19706 *

[Bug target/81800] [8 regression] on aarch64 ilp32 lrint should not be inlined as two instructions

2017-09-12 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81800 --- Comment #7 from Tamar Christina --- Yes, sorry I neglected to update the assignee. The bug itself is simple to fix but it highlighted a different related problem. That's what's delayed the fix.

[Bug middle-end/19706] Recognize common Fortran usages of copysign.

2017-09-13 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19706 Tamar Christina changed: What|Removed |Added Status|NEW |ASSIGNED

[Bug testsuite/78421] [7/8 Regression] vect-strided-a-u8-i2-gap.c fails on armeb

2017-09-21 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78421 --- Comment #7 from Tamar Christina --- Author: tnfchris Date: Thu Sep 21 14:45:03 2017 New Revision: 253073 URL: https://gcc.gnu.org/viewcvs?rev=253073&root=gcc&view=rev Log: 2017-09-21 Tamar Christina PR testsuite/78421 * l

[Bug sanitizer/77631] no symbols in backtrace shown by ASan when debug info is split

2017-09-22 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77631 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org

[Bug sanitizer/77631] no symbols in backtrace shown by ASan when debug info is split

2017-09-25 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77631 --- Comment #18 from Tamar Christina --- Thanks for the quick fix Ian!

[Bug c/81854] weak alias of an incompatible symbol accepted

2017-09-26 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81854 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org

[Bug fortran/82143] add a -fdefault-real-16 flag

2017-09-26 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82143 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org

[Bug c/81854] weak alias of an incompatible symbol accepted

2017-09-26 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81854 --- Comment #16 from Tamar Christina --- Thanks Martin!, I'll follow the other ticket.

[Bug tree-optimization/80928] SLP vectorization does not handle induction in outer loop vectorization

2017-10-05 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80928 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org

[Bug target/82440] [8 regression] ICE in aarch64_simd_valid_immediate

2017-10-06 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82440 --- Comment #4 from Tamar Christina --- Author: tnfchris Date: Fri Oct 6 13:25:18 2017 New Revision: 253490 URL: https://gcc.gnu.org/viewcvs?rev=253490&root=gcc&view=rev Log: Committed on behalf of Sudi Das 2017-10-06 Sudakshina Das

[Bug target/81800] [8 regression] on aarch64 ilp32 lrint should not be inlined as two instructions

2017-10-25 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81800 --- Comment #8 from Tamar Christina --- Author: tnfchris Date: Thu Oct 26 06:42:41 2017 New Revision: 254098 URL: https://gcc.gnu.org/viewcvs?rev=254098&root=gcc&view=rev Log: 2017-10-26 Tamar Christina PR target/81800 * conf

[Bug target/81800] [8 regression] on aarch64 ilp32 lrint should not be inlined as two instructions

2017-10-25 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81800 Tamar Christina changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2017-10-31 Thread tnfchris at gcc dot gnu.org
|unassigned at gcc dot gnu.org |tnfchris at gcc dot gnu.org --- Comment #5 from Tamar Christina --- My patch adds support for ``` #pragma GCC push_options #pragma GCC target("arch=armv8-a+crc") __attribute__((target("arch=armv8-a+crc"))) uint32_t crc32cw(uint32_t crc, uint32_

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2017-11-03 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 --- Comment #8 from Tamar Christina --- > It would be great if `+crc` can work if it's not ambiguous. Requiring > `arch=armv8-a+crc` works for me too, and it'll just require more preprocessor > checks. Yes I'm adding `+crc` and `arch=...`.

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2017-11-10 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 --- Comment #9 from Tamar Christina --- Author: tnfchris Date: Fri Nov 10 17:14:28 2017 New Revision: 254632 URL: https://gcc.gnu.org/viewcvs?rev=254632&root=gcc&view=rev Log: 2017-11-10 Tamar Christina PR target/82641 * conf

[Bug middle-end/79665] gcc's signed (x*x)/200 is slower than clang's

2017-04-27 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79665 --- Comment #15 from tnfchris at gcc dot gnu.org --- Author: tnfchris Date: Thu Apr 27 09:58:27 2017 New Revision: 247307 URL: https://gcc.gnu.org/viewcvs?rev=247307&root=gcc&view=rev Log: 2017-04-26 Tamar Christina PR mi

[Bug middle-end/79665] gcc's signed (x*x)/200 is slower than clang's

2017-05-08 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79665 --- Comment #18 from tnfchris at gcc dot gnu.org --- Author: tnfchris Date: Mon May 8 09:45:46 2017 New Revision: 247734 URL: https://gcc.gnu.org/viewcvs?rev=247734&root=gcc&view=rev Log: 2017-05-08 Tamar Christina PR mi

[Bug middle-end/77925] Add __builtin_issubnormal

2017-06-08 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77925 --- Comment #1 from tnfchris at gcc dot gnu.org --- Author: tnfchris Date: Thu Jun 8 07:38:42 2017 New Revision: 249005 URL: https://gcc.gnu.org/viewcvs?rev=249005&root=gcc&view=rev Log: 2017-06-08 Tamar Christina PR mi

[Bug middle-end/77926] Add __builtin_iszero

2017-06-08 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77926 --- Comment #1 from tnfchris at gcc dot gnu.org --- Author: tnfchris Date: Thu Jun 8 07:38:42 2017 New Revision: 249005 URL: https://gcc.gnu.org/viewcvs?rev=249005&root=gcc&view=rev Log: 2017-06-08 Tamar Christina PR mi

[Bug middle-end/66462] GCC isinf/isnan/... builtins cause sNaN exceptions

2017-06-08 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66462 --- Comment #4 from tnfchris at gcc dot gnu.org --- Author: tnfchris Date: Thu Jun 8 07:38:42 2017 New Revision: 249005 URL: https://gcc.gnu.org/viewcvs?rev=249005&root=gcc&view=rev Log: 2017-06-08 Tamar Christina PR mi

[Bug middle-end/77925] Add __builtin_issubnormal

2017-06-08 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77925 tnfchris at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED

[Bug middle-end/77926] Add __builtin_iszero

2017-06-08 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77926 tnfchris at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED

[Bug middle-end/66462] GCC isinf/isnan/... builtins cause sNaN exceptions

2017-06-08 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66462 tnfchris at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED

[Bug middle-end/66462] GCC isinf/isnan/... builtins cause sNaN exceptions

2017-06-09 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66462 tnfchris at gcc dot gnu.org changed: What|Removed |Added Status|RESOLVED|VERIFIED --- Comment #7

[Bug middle-end/66462] GCC isinf/isnan/... builtins cause sNaN exceptions

2017-06-09 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66462 tnfchris at gcc dot gnu.org changed: What|Removed |Added Status|VERIFIED|REOPENED Last

[Bug middle-end/77925] Add __builtin_issubnormal

2017-06-12 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77925 tnfchris at gcc dot gnu.org changed: What|Removed |Added Status|RESOLVED|REOPENED Last

[Bug middle-end/77926] Add __builtin_iszero

2017-06-12 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77926 tnfchris at gcc dot gnu.org changed: What|Removed |Added Status|RESOLVED|REOPENED Last

[Bug middle-end/19706] Recognize common Fortran usages of copysign.

2017-08-08 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19706 --- Comment #2 from Tamar Christina --- Author: tnfchris Date: Tue Aug 8 13:15:44 2017 New Revision: 250956 URL: https://gcc.gnu.org/viewcvs?rev=250956&root=gcc&view=rev Log: 2017-08-08 Tamar Christina Andrew Pinski PR

[Bug middle-end/19706] Recognize common Fortran usages of copysign.

2017-08-08 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19706 --- Comment #3 from Tamar Christina --- Author: tnfchris Date: Tue Aug 8 13:17:41 2017 New Revision: 250957 URL: https://gcc.gnu.org/viewcvs?rev=250957&root=gcc&view=rev Log: 2017-08-08 Tamar Christina PR middle-end/19706 *

[Bug middle-end/19706] Recognize common Fortran usages of copysign.

2017-08-09 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19706 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2018-02-09 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 --- Comment #29 from Tamar Christina --- Author: tnfchris Date: Fri Feb 9 12:23:46 2018 New Revision: 257524 URL: https://gcc.gnu.org/viewcvs?rev=257524&root=gcc&view=rev Log: 2018-02-09 Tamar Christina PR target/82641 * con

[Bug target/82641] Unable to enable crc32 for a certain function with target attribute on ARM (aarch32)

2018-02-12 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82641 --- Comment #30 from Tamar Christina --- Author: tnfchris Date: Mon Feb 12 12:52:29 2018 New Revision: 257586 URL: https://gcc.gnu.org/viewcvs?rev=257586&root=gcc&view=rev Log: 2018-02-12 Tamar Christina PR target/82641 * gcc

[Bug debug/84342] New: Location views breaks cross and native builds of arm

2018-02-12 Thread tnfchris at gcc dot gnu.org
Component: debug Assignee: unassigned at gcc dot gnu.org Reporter: tnfchris at gcc dot gnu.org CC: aoliva at gcc dot gnu.org Target Milestone: --- Target: arm*-*-* Commit r257510 breaks all cross and bootstrap builds of arm. /tmp/ccf8XE3m.s: Assembler

[Bug debug/84342] [8 Regression] Location views breaks cross and native builds of arm

2018-02-12 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84342 Tamar Christina changed: What|Removed |Added Priority|P3 |P1 Summary|Location views b

[Bug debug/84342] [8 Regression] Location views breaks cross builds of arm including gnueabihf

2018-02-12 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84342 --- Comment #1 from Tamar Christina --- native builds do seem to work, it's all the cross builds that seem to be broken.

[Bug debug/84342] [8 Regression] Location views breaks cross builds of arm including gnueabihf

2018-02-13 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84342 --- Comment #4 from Tamar Christina --- That patch does fix the build again! I'll still try to figure out what's going wrong in the back-end. Thanks

[Bug debug/84342] [8 Regression] Location views breaks cross builds of arm including gnueabihf

2018-02-14 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84342 --- Comment #7 from Tamar Christina --- Jeff: ccfsm is indeed the problem here, as it does indeed decide quite late to remove a branch. Though we've tried emitting a nop instead of nothing just to test and this fixes the branch but causes another

[Bug c/84168] Please backport "Avoid assembler warnings from AArch64 constructor/destructor priorities."

2018-02-23 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84168 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org

[Bug rtl-optimization/84614] [8 Regression] wrong code with u16->u128 extension at aarch64 -fno-split-wide-types -g3 --param=max-combine-insns=3

2018-02-28 Thread tnfchris at gcc dot gnu.org
||2018-02-28 CC||tnfchris at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Tamar Christina --- Confirmed. It seems to be a problem with -Og, any other optimization level with -g enabled works fine.

[Bug target/84711] New: AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.

2018-03-05 Thread tnfchris at gcc dot gnu.org
: normal Priority: P3 Component: target Assignee: tnfchris at gcc dot gnu.org Reporter: tnfchris at gcc dot gnu.org Target Milestone: --- Target: armeb-*-* The following example typedef __fp16 v4f16 __attribute__ ((vector_size (8))); v4f16 fn1

[Bug target/84711] AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.

2018-03-05 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84711 Tamar Christina changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug target/84711] AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.

2018-03-05 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84711 Tamar Christina changed: What|Removed |Added Target Milestone|--- |9.0

[Bug target/84711] AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.

2018-03-05 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84711 Tamar Christina changed: What|Removed |Added Target Milestone|9.0 |8.0 --- Comment #2 from Tamar Christin

[Bug driver/83206] -mfpu=auto does not work on ARM (armv7l-unknown-linux-gnueabihf)

2018-03-07 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83206 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org

[Bug target/84711] AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.

2018-03-15 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84711 --- Comment #3 from Tamar Christina --- Author: tnfchris Date: Thu Mar 15 10:53:17 2018 New Revision: 258554 URL: https://gcc.gnu.org/viewcvs?rev=258554&root=gcc&view=rev Log: 2018-03-15 Tamar Christina PR target/84711 * conf

[Bug target/84711] AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.

2018-03-15 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84711 Tamar Christina changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/84711] AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.

2018-03-15 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84711 Tamar Christina changed: What|Removed |Added Status|RESOLVED|ASSIGNED Resolution|FIXED

[Bug target/84711] AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.

2018-03-19 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84711 --- Comment #9 from Tamar Christina --- Hi Christophhe, This seems to be a combine issue. It thinks that (set (reg/i:SF 16 s0) (vec_select:SF (reg:V4SF 16 s0 [ xD.6085 ]) (parallel [ (const_int 0 [0]) ])

[Bug target/84711] AArch32 big-endian fails when taking subreg of a vector mode to a scalar mode.

2018-03-19 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84711 --- Comment #10 from Tamar Christina --- Author: tnfchris Date: Mon Mar 19 09:14:25 2018 New Revision: 258642 URL: https://gcc.gnu.org/viewcvs?rev=258642&root=gcc&view=rev Log: gcc/ 2018-03-19 Tamar Christina PR target/84711

[Bug middle-end/85123] [8 regression] test case gcc.dg/pr63594-2.c begins failing with r254862

2018-04-05 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85123 Tamar Christina changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |tnfchris at gcc dot gnu.org

[Bug middle-end/85123] [8 regression] test case gcc.dg/pr63594-2.c begins failing with r254862

2018-04-06 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85123 --- Comment #7 from Tamar Christina --- Patch has been reverted as r259169.

[Bug ipa/85449] New: [8 Regression] Wrong specialization is called in self recursive functions after r259319

2018-04-18 Thread tnfchris at gcc dot gnu.org
Severity: normal Priority: P3 Component: ipa Assignee: unassigned at gcc dot gnu.org Reporter: tnfchris at gcc dot gnu.org CC: marxin at gcc dot gnu.org Target Milestone: --- Created attachment 43977 --> https://gcc.gnu.org/bugzi

[Bug ipa/84149] [8 Regression] SPEC CPU2017 505.mcf/605.mcf ~10% performance regression with r256888

2018-04-18 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84149 Tamar Christina changed: What|Removed |Added CC||tnfchris at gcc dot gnu.org

[Bug ipa/85449] [8 Regression] Wrong specialization is called in self recursive functions after r259319

2018-04-18 Thread tnfchris at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85449 --- Comment #2 from Tamar Christina --- The latest master seems to not trigger the problematic specializations. Instead check out commit d7ddbf366197605642f725cce6165dfb179a114e and then a normal CFLAGS="-O3 -w -save-temps" ./configure make m

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