https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111794
--- Comment #10 from Robin Dapp ---
>From what I can tell with my barely working connection no regressions on x86,
aarch64 or power10 with the adjusted check.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111794
--- Comment #9 from Robin Dapp ---
Yes, that's from pattern recog:
slp.c:11:20: note: === vect_pattern_recog ===
slp.c:11:20: note: vect_recog_mask_conversion_pattern: detected: _5 = _2 &
_4;
slp.c:11:20: note: mask_conversion pattern rec
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111794
--- Comment #8 from rguenther at suse dot de ---
On Mon, 16 Oct 2023, rdapp at gcc dot gnu.org wrote:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111794
>
> --- Comment #7 from Robin Dapp ---
> vectp.4_188 = x_50(D);
> vect__1.5_189 =
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111794
--- Comment #7 from Robin Dapp ---
vectp.4_188 = x_50(D);
vect__1.5_189 = MEM [(int *)vectp.4_188];
mask__2.6_190 = { 1, 1, 1, 1, 1, 1, 1, 1 } == vect__1.5_189;
mask_patt_156.7_191 = VIEW_CONVERT_EXPR>(mask__2.6_190);
_1 = *x_50(D);
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111794
--- Comment #6 from rguenther at suse dot de ---
On Mon, 16 Oct 2023, rdapp at gcc dot gnu.org wrote:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111794
>
> --- Comment #5 from Robin Dapp ---
> Disregarding the reasons for the precision ad
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111794
--- Comment #5 from Robin Dapp ---
Disregarding the reasons for the precision adjustment, for this case here, we
seem to fail at:
/* We do not handle bit-precision changes. */
if ((CONVERT_EXPR_CODE_P (code)
|| code == VIEW_CONVERT_
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111794
--- Comment #4 from Robin Dapp ---
Just to mention here as well. As this seems ninstance++ where the
adjust_precision thing comes back to bite us, I'm going to go back and check if
the issue why it was introduced (DCE?) cannot be solved differe
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111794
Richard Biener changed:
What|Removed |Added
Keywords||missed-optimization
--- Comment #3 fro
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111794
--- Comment #2 from JuzheZhong ---
Note that the reason we adjust the mask mode precision here is because
the DSE bug for "small mask mode"
https://github.com/gcc-mirror/gcc/commit/247cacc9e381d666a492dfa4ed61b7b19e2d008f
This is the commit
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111794
--- Comment #1 from JuzheZhong ---
This is RISC-V target specific issue.
ARM SVE can vectorize it.
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