[Bug middle-end/112854] [14] RISCV ICE: expand: in store_integral_bit_field, at expmed.cc:1049 on rv32gcv_zvl1024b --param=riscv-autovec-preference=fixed-vlmax

2023-12-06 Thread patrick at rivosinc dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112854 Patrick O'Neill changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug middle-end/112854] [14] RISCV ICE: expand: in store_integral_bit_field, at expmed.cc:1049 on rv32gcv_zvl1024b --param=riscv-autovec-preference=fixed-vlmax

2023-12-06 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112854 --- Comment #4 from GCC Commits --- The master branch has been updated by Robin Dapp : https://gcc.gnu.org/g:056cce412862f8d9b56a40dfbcbc3f9fa7f92883 commit r14-6211-g056cce412862f8d9b56a40dfbcbc3f9fa7f92883 Author: Robin Dapp Date: Tue Dec

[Bug middle-end/112854] [14] RISCV ICE: expand: in store_integral_bit_field, at expmed.cc:1049 on rv32gcv_zvl1024b --param=riscv-autovec-preference=fixed-vlmax

2023-12-05 Thread rdapp at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112854 --- Comment #3 from Robin Dapp --- The problem seems to be that we can overlay a 32-bit bitmask with an SImode subreg and work with it. For zvl1024b on rv32 we don't allow this causing the ICE. We might be able to work around it by providing a

[Bug middle-end/112854] [14] RISCV ICE: expand: in store_integral_bit_field, at expmed.cc:1049 on rv32gcv_zvl1024b --param=riscv-autovec-preference=fixed-vlmax

2023-12-05 Thread rdapp at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112854 --- Comment #2 from Robin Dapp --- Hehe I was hoping we wouldn't hit a vec_set on a mask but apparently this happens as well. We don't have a pattern for that either, yet. Thanks for the test. I would expect this to be fixed in a similar way

[Bug middle-end/112854] [14] RISCV ICE: expand: in store_integral_bit_field, at expmed.cc:1049 on rv32gcv_zvl1024b --param=riscv-autovec-preference=fixed-vlmax

2023-12-04 Thread juzhe.zhong at rivai dot ai via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112854 --- Comment #1 from JuzheZhong --- I have noticed in full coverage testing. It's mask bit field related issue again. Robin could you take a look at it ? I think you are the better one than me to take care of it. Thanks.