http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59273

            Bug ID: 59273
           Summary: [4.9 Regression] ICE in expand_expr_real_2, at
                    expr.c:9188 on alpha
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: middle-end
          Assignee: unassigned at gcc dot gnu.org
          Reporter: ubizjak at gmail dot com

Recent change introduced following new testsuite failure (and several others)
on alpha-linux-gnu [1]:

FAIL: gcc.dg/torture/pr46723.c  -O3 -fomit-frame-pointer  (internal compiler
error)
FAIL: gcc.dg/torture/pr46723.c  -O3 -fomit-frame-pointer  (test for excess
errors)
...

The failure can be triggered on a crosscompiler from x86_64 to alpha-linux-gnu:

$ gcc-build-alpha/gcc/cc1 -O3 -fpreprocessed pr46723.c

pr46723.c: In function ‘test’:
pr46723.c:4:6: internal compiler error: in expand_expr_real_2, at expr.c:9188
 void test()
      ^
0x6beb38 expand_expr_real_2(separate_ops*, rtx_def*, machine_mode,
expand_modifier)
        /home/uros/gcc-svn/trunk/gcc/expr.c:9188
0x5e8ed9 expand_gimple_stmt_1
        /home/uros/gcc-svn/trunk/gcc/cfgexpand.c:3235
0x5e8ed9 expand_gimple_stmt
        /home/uros/gcc-svn/trunk/gcc/cfgexpand.c:3295
0x5eafda expand_gimple_basic_block
        /home/uros/gcc-svn/trunk/gcc/cfgexpand.c:5135
0x5ecf3c gimple_expand_cfg
        /home/uros/gcc-svn/trunk/gcc/cfgexpand.c:5701
0x5ecf3c execute
        /home/uros/gcc-svn/trunk/gcc/cfgexpand.c:5921
Please submit a full bug report,

(gdb) up
#2  0x00000000006beb39 in expand_expr_real_2 (ops=ops@entry=0x7fffffffd9b0,
target=0x7ffff19c5100, tmode=<optimized out>,
modifier=modifier@entry=EXPAND_NORMAL)
    at /home/uros/gcc-svn/trunk/gcc/expr.c:9188
9188      gcc_assert (temp);
(gdb) list
9183     binop3:
9184      if (modifier == EXPAND_STACK_PARM)
9185        target = 0;
9186      temp = expand_binop (mode, this_optab, op0, op1, target,
9187                           unsignedp, OPTAB_LIB_WIDEN);
9188      gcc_assert (temp);
9189      /* Bitwise operations do not need bitfield reduction as we expect
their
9190         operands being properly truncated.  */
9191      if (code == BIT_XOR_EXPR
9192          || code == BIT_AND_EXPR

(gdb) p debug_rtx (target)
(reg:V4HI 130 [ vect_vec_iv_.17 ])
$1 = void
(gdb) p debug_rtx (op0)
(reg:V4HI 174 [ D.1496 ])
$2 = void
(gdb) p debug_rtx (op1)
(const_vector:V4HI [
        (const_int 0 [0])
        (const_int 1 [0x1])
        (const_int 2 [0x2])
        (const_int 3 [0x3])
    ])
$3 = void
(gdb) p code
$4 = PLUS_EXPR

The compiler is trying to blindly generate V4HImode vector addition without
checking if the target supports it (alpha doesn't, while it supports V4HImode
moves).

[1] http://gcc.gnu.org/ml/gcc-testresults/2013-11/msg01763.html

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