--- Additional Comments From tbptbp at gmail dot com 2005-01-30 08:07
---
I'm sorry for providing such a poor testcase.
Here's the kind of *48 sequence i'm seeing, k8 codegen; that's happening at a
point where's there's quite some register pressure and it really doesn't help
that
--- Additional Comments From rth at gcc dot gnu dot org 2005-01-30 07:30
---
No, Steven, this is a different problem. Note that there are not two
memory references, as in the other PR.
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What|Removed |Added
--- Additional Comments From rth at gcc dot gnu dot org 2005-01-30 07:45
---
That said, what are you expecting here for massage48? On K8, the latency
of imul for a 32-bit register operand is 3 cycles. Alternately, we can
break this down into
leal (%eax,%eax,2), %eax
sall $4,
--- Additional Comments From tbptbp at gmail dot com 2005-01-28 23:35
---
Created an attachment (id=8095)
-- (http://gcc.gnu.org/bugzilla/attachment.cgi?id=8095action=view)
Various address generation snippets
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19680
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What|Removed |Added
Attachment #8095|text/x-c|text/plain
mime type||
--- Additional Comments From steven at gcc dot gnu dot org 2005-01-29
02:34 ---
*** This bug has been marked as a duplicate of 18463 ***
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What|Removed |Added
