--- Comment #7 from wilson at tuliptree dot org 2005-11-09 21:07 ---
Subject: Re: [3.4/4.0/4.1 regression] amd64
register spill error with -fschedule-insns
On Wed, 2005-11-09 at 07:27, uros at kss-loka dot si wrote:
> (BTW: I have added Jim Wilson to CC of this bug as he is cur
--- Comment #6 from uros at kss-loka dot si 2005-11-09 15:27 ---
The problem is caused by the combination of (1) x86_64 parameter passing
convention, (2) x86 instructions that _require_ parameters in specific
registers and (3) sched1 scheduling pass.
ad 1)
x86_64 passes function parame
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pinskia at gcc dot gnu dot org changed:
What|Removed |Added
Priority|P2 |P5
Target Milestone|--- |4.1.0
http://gcc
--- Comment #5 from pinskia at gcc dot gnu dot org 2005-10-11 23:43 ---
(In reply to comment #4)
> Confirmed, broken by this patch:
> http://gcc.gnu.org/ml/gcc-patches/2003-01/msg02147.html
This patch just exposes a latent bug in the RA, not be able to handle stuf like
this.
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pins
--- Comment #4 from belyshev at depni dot sinp dot msu dot ru 2005-10-11
23:18 ---
Confirmed, broken by this patch:
http://gcc.gnu.org/ml/gcc-patches/2003-01/msg02147.html
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belyshev at depni dot sinp dot msu dot ru changed:
What|Removed |Added
-
