https://gcc.gnu.org/bugzilla/show_bug.cgi?id=30688
Xi Ruoyao changed:
What|Removed |Added
Resolution|WONTFIX |---
Status|RESOLVED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=30688
Andi Kleen changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
--- Comment #6 from wilson at codesourcery dot com 2009-03-16 19:07 ---
Subject: Re: Branch registers loaded too late
on ia64
steven at gcc dot gnu dot org wrote:
> --- Comment #5 from steven at gcc dot gnu dot org 2009-03-16 08:46
> ---
> Can someone point me to the IA64 op
--- Comment #5 from steven at gcc dot gnu dot org 2009-03-16 08:46 ---
Can someone point me to the IA64 optimiation manuals mentioned in comment #0?
I'm looking for some answers, for example:
* Which branch registers can I use? bt-load can actually perform register
renaming. It has
--- Comment #4 from steven at gcc dot gnu dot org 2009-03-10 06:48 ---
The load to the general register should also be moved by bt-load, then.
The bt-load pass is "designed" for SH only, in its current state, but I think
extending it to move a small group of insns instead of just one sh
--- Comment #3 from sje at cup dot hp dot com 2009-02-24 00:01 ---
More work is needed then just setting flag_branch_target_optimize{,2}, we need
to define TARGET_BRANCH_TARGET_REGISTER_CLASS (return BR_REGS) and
TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED (return 1) but even then it doe
--- Comment #2 from steven at gcc dot gnu dot org 2009-02-06 21:21 ---
GCC has the bt-load optimization for this. But this code is not enabled for
ia64. It could be so simple as just setting flag_branch_target_optimize{,2} to
true in the ia64 backend, but maybe more work is needed (I h
--- Comment #1 from ak at muc dot de 2007-02-03 11:22 ---
Here's a simple test case:
void f(int k, int (*fptr)(int i))
{
int i;
/* Do something useless */
for (i = 0; i < 5; i++)
k *= 10;
fptr(k);
}
compiled with 4.3.0 20070203 gi
