https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
Maciej W. Rozycki ma...@linux-mips.org changed:
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CC|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
Steve Ellcey sje at gcc dot gnu.org changed:
What|Removed |Added
CC||sje at gcc dot
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
christophe.lyon at st dot com changed:
What|Removed |Added
CC||christophe.lyon at st dot
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
--- Comment #27 from Vladimir Makarov vmakarov at gcc dot gnu.org ---
Author: vmakarov
Date: Thu May 22 21:09:59 2014
New Revision: 210824
URL: http://gcc.gnu.org/viewcvs?rev=210824root=gccview=rev
Log:
2014-05-22 Vladimir Makarov
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
--- Comment #28 from Vladimir Makarov vmakarov at gcc dot gnu.org ---
Author: vmakarov
Date: Thu May 22 21:10:26 2014
New Revision: 210825
URL: http://gcc.gnu.org/viewcvs?rev=210825root=gccview=rev
Log:
2014-05-22 Vladimir Makarov
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
Matthias Klose doko at gcc dot gnu.org changed:
What|Removed |Added
CC||doko at gcc dot
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
--- Comment #24 from uros at gcc dot gnu.org ---
Author: uros
Date: Sat May 17 10:35:44 2014
New Revision: 210549
URL: http://gcc.gnu.org/viewcvs?rev=210549root=gccview=rev
Log:
Backport from mainline
2014-04-25 H.J. Lu
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
Uroš Bizjak ubizjak at gmail dot com changed:
What|Removed |Added
Status|NEW |RESOLVED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
--- Comment #19 from H.J. Lu hjl.tools at gmail dot com ---
There is
#define VALID_MMX_REG_MODE_3DNOW(MODE) \
((MODE) == V2SFmode || (MODE) == SFmode)
and ix86_hard_regno_mode_ok returns TRUE for holding SFmode
in MMX registers. It is wrong
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
--- Comment #20 from Vladimir Makarov vmakarov at gcc dot gnu.org ---
The problem is ira-costs.c. One pseudo gets equal costs for memory and all
classes. Therefore when non-mmx hard regs are not enough, a mmx is used.
After initialization of
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
--- Comment #21 from H.J. Lu hjl.tools at gmail dot com ---
MMX and x87 registers are aliases of each others. They can't be used
at the same time. Is there a way to pass this information to RA?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
--- Comment #22 from Vladimir Makarov vmakarov at gcc dot gnu.org ---
Author: vmakarov
Date: Fri May 16 17:21:04 2014
New Revision: 210519
URL: http://gcc.gnu.org/viewcvs?rev=210519root=gccview=rev
Log:
2014-05-16 Vladimir Makarov
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
--- Comment #23 from Vladimir Makarov vmakarov at gcc dot gnu.org ---
Author: vmakarov
Date: Fri May 16 17:37:17 2014
New Revision: 210520
URL: http://gcc.gnu.org/viewcvs?rev=210520root=gccview=rev
Log:
2014-05-16 Vladimir Makarov
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
Uroš Bizjak ubizjak at gmail dot com changed:
What|Removed |Added
Keywords||ra
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
--- Comment #17 from H.J. Lu hjl.tools at gmail dot com ---
As long as both MMX and X87 registers are available to register allocator,
they may be used at the same time even if MMX usage is disparaged. Can we
disable MMX registers when x87
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60969
--- Comment #18 from Richard Henderson rth at gcc dot gnu.org ---
(In reply to H.J. Lu from comment #17)
That's probably the best solution long-term. Sometime before
register allocation (but not too far before) inspect the insn
stream and see
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