https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
Eric Botcazou changed:
What|Removed |Added
Attachment #45029|0 |1
is obsolete|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
Eric Botcazou changed:
What|Removed |Added
Attachment #44983|0 |1
is obsolete|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
--- Comment #17 from Eric Botcazou ---
On further thoughts, it might be possible to rescue the mechanism because the
problem here is that a ZERO_EXTRACT is happily rewritten from SI to HImode,
thus breaking the WORD_REGISTER_OPERATIONS semantics.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
--- Comment #16 from Eric Botcazou ---
Then people realized that there was a problem if the SUBREGs were spilled onto
the stack at some point, hence an additional test on LOAD_EXTEND_OP:
r8787 | wilson | 1995-01-21 03:23:10 +0100 (Sat, 21 Jan 19
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
--- Comment #15 from Eric Botcazou ---
OK, it's probably time to concede final defeat, although this will bring back
quite a few redundant extensions on RISC architectures like ARM and SPARC.
For the records, here's a bit of history about this s
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
--- Comment #14 from Eric Botcazou ---
> (so pretty much the same, but the previous runs had some weird pollution).
Thanks, slightly better though.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
--- Comment #13 from Segher Boessenkool ---
Sorry, I forgot. Here is the correct data:
alpha 100.834%
arm 100.040%
c6x 100.000%
csky 100.039%
h8300 100.000%
i386 100.000%
micro
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
--- Comment #12 from Segher Boessenkool ---
Yes, that is already running... Still has over an hour to go.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
--- Comment #11 from Eric Botcazou ---
> I get this:
>
>alpha 100.905%
> arm 100.072%
> c6x 100.000%
> csky 100.063%
>h8300 100.000%
> i386 100.000%
> microblaze 100.001%
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
--- Comment #10 from Segher Boessenkool ---
I get this:
alpha 100.905%
arm 100.072%
c6x 100.000%
csky 100.063%
h8300 100.000%
i386 100.000%
microblaze 100.001%
mips
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
--- Comment #9 from Eric Botcazou ---
> I'm running this on all archs, to see what (if anything) degrades.
I have both wins and losses, unlike the reversion of the nonzero_bits1 change
where I have only losses, but I nevertheless think it's _not
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
--- Comment #8 from Segher Boessenkool ---
I'm running this on all archs, to see what (if anything) degrades.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
--- Comment #7 from Eric Botcazou ---
For the testcase, the tentative fix adds only one instruction:
--- pr85925_0.s 2018-11-11 16:14:32.883280168 +0100
+++ pr85925.s 2018-11-11 16:16:34.734727859 +0100
@@ -38,6 +38,7 @@
ldreq lr, [i
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
Eric Botcazou changed:
What|Removed |Added
Attachment #44982|0 |1
is obsolete|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
--- Comment #5 from Eric Botcazou ---
Created attachment 44982
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=44982&action=edit
Tentative fix
I'm going to evaluate it on ARM and SPARC wrt pessimization.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
Richard Biener changed:
What|Removed |Added
Priority|P3 |P2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
--- Comment #4 from Segher Boessenkool ---
Any progress with this PR?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
Eric Botcazou changed:
What|Removed |Added
Status|NEW |ASSIGNED
Assignee|segher at gc
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
Eric Botcazou changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
Jakub Jelinek changed:
What|Removed |Added
CC||jakub at gcc dot gnu.org,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85925
Richard Biener changed:
What|Removed |Added
Keywords||wrong-code
Target|
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