[Bug rtl-optimization/96031] suboptimal codegen for store low 16-bits value

2021-08-22 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96031 Andrew Pinski changed: What|Removed |Added Severity|normal |enhancement See Also|

[Bug rtl-optimization/96031] suboptimal codegen for store low 16-bits value

2020-08-25 Thread zhongyunde at tom dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96031 --- Comment #4 from zhongyunde at tom dot com --- > As for ivopt, I can see a minor improvement by replacing != exit condition > with <=, thus saving add 2 instruction computing _22, which happens to > "disable" the wrong PRE transformation. >

[Bug rtl-optimization/96031] suboptimal codegen for store low 16-bits value

2020-07-20 Thread zhongyunde at tom dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96031 --- Comment #3 from zhongyunde at tom dot com --- I find there is some different between the two cases during in ivopts. For the 2nd case, a UINT32 type iv sum is choosed [local count: 955630224]: # sum_15 = PHI <0(5), sum_9(6)> #

[Bug rtl-optimization/96031] suboptimal codegen for store low 16-bits value

2020-07-19 Thread amker at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96031 --- Comment #2 from bin cheng --- Interesting case, I see two issues in generated asm. One is the unnecessary bitwise and, the other is allocating different registers for induction variable and the base address. However, looks like neither

[Bug rtl-optimization/96031] suboptimal codegen for store low 16-bits value

2020-07-06 Thread zhongyunde at tom dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96031 --- Comment #1 from zhongyunde at tom dot com --- this may can be enhance by ivopts. If the case adjusted as following, then the 'and w2, w2, 65535 ' will disappear. typedef unsigned int UINT32; typedef unsigned short UINT16; UINT16