https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100760

            Bug ID: 100760
           Summary: [mips + msa] ICE: maximum number of generated reload
                    insns per insn achieved
           Product: gcc
           Version: 10.2.1
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: e...@coeus-group.com
  Target Milestone: ---

Created attachment 50869
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=50869&action=edit
preprocessed, un-reduced reproducer

I'm getting an ICE when attempting to compile some code on MIPS with MSA which
works on other architectures, and on MIPS without MSA.  Here is a reduced test
case courtesy of C-Reduce:


typedef int a;
void b() { a __attribute__((__vector_size__(8))) c{1, 1}; }


Compile with `mips64el-linux-gnuabi64-g++-10 -march=loongson3a -mmsa -o test
test.c`

I've also attached a pre-processed copy of the original, non-reduced code.  The
original is at
https://github.com/simd-everywhere/simde/blob/7d0e2aca9458f760d7196b94bfdcf83b2178ea24/simde/arm/neon/cmla_rot90.h#L50-L52
(SIMDE_SHUFFLE_VECTOR_ is defined at
https://github.com/simd-everywhere/simde/blob/7d0e2aca9458f760d7196b94bfdcf83b2178ea24/simde/simde-common.h#L278-L281)

This is with 10.2.1-6 from Debian:

/usr/bin/mips64el-linux-gnuabi64-gcc-10 --version
mips64el-linux-gnuabi64-gcc-10 (Debian 10.2.1-6) 10.2.1 20210110
Copyright (C) 2020 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

Reply via email to