[Bug target/105288] AVX/AVX512 casts should use the "v" constraint

2022-04-17 Thread crazylht at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105288 --- Comment #2 from Hongtao.liu --- I think HJ means avx__ can be extended to evex sse registes by change "x" to "v" when AVX512VL is available. For avx512f__, it should be "=Yv,m" " vm,v" since operands[0] could be allocated as evex register

[Bug target/105288] AVX/AVX512 casts should use the "v" constraint

2022-04-15 Thread wwwhhhyyy333 at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105288 --- Comment #1 from Hongyu Wang --- I think should be these 2? (define_insn_and_split "avx512f__" [(set (match_operand:AVX512MODE2P 0 "nonimmediate_operand" "=x,m") (vec_concat:AVX512MODE2P (vec_concat: (match_op