[Bug target/111755] The built-in memset function in GCC inadvertently generates code like "vst1.8 {d8-d9}, [sp:64]", which assumes an 8-byte alignment on the stack pointer $sp, leading to alignment vi

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111755 Andrew Pinski changed: What|Removed |Added Last reconfirmed||2023-10-10 Ever confirmed|0

[Bug target/111755] The built-in memset function in GCC inadvertently generates code like "vst1.8 {d8-d9}, [sp:64]", which assumes an 8-byte alignment on the stack pointer $sp, leading to alignment vi

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111755 --- Comment #2 from Andrew Pinski --- Also can you attach the testcase where this happens? Please read https://gcc.gnu.org/bugs/ on what information we need.

[Bug target/111755] The built-in memset function in GCC inadvertently generates code like "vst1.8 {d8-d9}, [sp:64]", which assumes an 8-byte alignment on the stack pointer $sp, leading to alignment vi

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111755 --- Comment #3 from Andrew Pinski --- The ARM EABI says the stack is always aligned to 8 byte so unless you change GCC to be do this, this is exacted and the incoming stack needs to be aligned correctly.

[Bug target/111755] The built-in memset function in GCC inadvertently generates code like "vst1.8 {d8-d9}, [sp:64]", which assumes an 8-byte alignment on the stack pointer $sp, leading to alignment vi

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111755 --- Comment #4 from kuzume --- I apologize, but I will retract this report. I've realized that the IRQ handler call of a certain RTOS I'm using is invoking with $sp as a multiple of 4, not 8. This violates the ARM ABI convention.

[Bug target/111755] The built-in memset function in GCC inadvertently generates code like "vst1.8 {d8-d9}, [sp:64]", which assumes an 8-byte alignment on the stack pointer $sp, leading to alignment vi

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111755 Andrew Pinski changed: What|Removed |Added Status|WAITING |RESOLVED Resolution|---