https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113744
Bug ID: 113744 Summary: Unnecessary "m" constraint in *adddi_4 Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: hjl.tools at gmail dot com CC: crazylht at gmail dot com, hongyuw at gcc dot gnu.org, lingling.kong7 at gmail dot com Target Milestone: --- commit 7abcef725e40589553a079df9258ae094b811751 Author: Kong Lingling <lingling.k...@intel.com> Date: Wed Jan 18 17:23:29 2023 +0800 [APX NDD] Support APX NDD for optimization patterns of add has @@ -6994,31 +7021,35 @@ (define_insn "*addsi_3_zext" (define_insn "*adddi_4" [(set (reg FLAGS_REG) (compare - (match_operand:DI 1 "nonimmediate_operand" "0") - (match_operand:DI 2 "x86_64_immediate_operand" "e"))) - (clobber (match_scratch:DI 0 "=r"))] + (match_operand:DI 1 "nonimmediate_operand" "0,rm") + (match_operand:DI 2 "x86_64_immediate_operand" "e,e"))) + (clobber (match_scratch:DI 0 "=r,r"))] "TARGET_64BIT && ix86_match_ccmode (insn, CCGCmode)" But peephole which generates *adddi_4 only supports register as operand 2.