[Bug target/115169] [14/15 regression] ICE in loongarch bootstrap with checking: RTL check: expected code 'reg', have 'const_int' in rhs_regno, at rtl.h:1934

2024-05-28 Thread matoro_gcc_bugzilla at matoro dot tk via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115169 --- Comment #10 from matoro --- (In reply to Xi Ruoyao from comment #9) > Fixed. > > For the SIGILL issue note that in GCC 14 the default of -march is raised > from loongarch64 to la64v1.0 which implies LSX. So I'd suggest to check if > CPU_HA

[Bug target/115169] [14/15 regression] ICE in loongarch bootstrap with checking: RTL check: expected code 'reg', have 'const_int' in rhs_regno, at rtl.h:1934

2024-05-27 Thread xry111 at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115169 Xi Ruoyao changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/115169] [14/15 regression] ICE in loongarch bootstrap with checking: RTL check: expected code 'reg', have 'const_int' in rhs_regno, at rtl.h:1934

2024-05-27 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115169 --- Comment #8 from GCC Commits --- The releases/gcc-14 branch has been updated by Xi Ruoyao : https://gcc.gnu.org/g:e78980fdd5e82e09e26f524e98ad9cd90a29c1c4 commit r14-10249-ge78980fdd5e82e09e26f524e98ad9cd90a29c1c4 Author: Xi Ruoyao Date:

[Bug target/115169] [14/15 regression] ICE in loongarch bootstrap with checking: RTL check: expected code 'reg', have 'const_int' in rhs_regno, at rtl.h:1934

2024-05-27 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115169 --- Comment #7 from GCC Commits --- The master branch has been updated by Xi Ruoyao : https://gcc.gnu.org/g:ded91d857772c0183cc342cdc54d9128f6c57fa2 commit r15-856-gded91d857772c0183cc342cdc54d9128f6c57fa2 Author: Xi Ruoyao Date: Wed May 22

[Bug target/115169] [14/15 regression] ICE in loongarch bootstrap with checking: RTL check: expected code 'reg', have 'const_int' in rhs_regno, at rtl.h:1934

2024-05-21 Thread xry111 at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115169 Xi Ruoyao changed: What|Removed |Added Status|NEW |ASSIGNED

[Bug target/115169] [14/15 regression] ICE in loongarch bootstrap with checking: RTL check: expected code 'reg', have 'const_int' in rhs_regno, at rtl.h:1934

2024-05-21 Thread xry111 at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115169 Xi Ruoyao changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |xry111 at gcc dot gnu.org --- Comme

[Bug target/115169] [14/15 regression] ICE in loongarch bootstrap with checking: RTL check: expected code 'reg', have 'const_int' in rhs_regno, at rtl.h:1934

2024-05-20 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115169 Andrew Pinski changed: What|Removed |Added Ever confirmed|0 |1 Target Milestone|---