[Bug target/115995] RISC-V: Can't generate portable RVV code for rv64gcv_zvl512b

2024-07-23 Thread sh.chiang04 at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115995 --- Comment #1 from Monk Chiang --- Another test, the compile option is "g++ -march=rv64gcv_zvl128b -mabi=lp64d -O3" #include #include #include using namespace std; int main () { std::vector data = {2, 2, 2, 2, 2, 2}; std::vector result

[Bug target/115995] RISC-V: Can't generate portable RVV code for rv64gcv_zvl512b

2024-07-23 Thread rdapp at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115995 --- Comment #2 from Robin Dapp --- Hmm I can't reproduce either. riscv64-unknown-linux-gnu-gcc -march=rv64gcv_zvl512b1p0 -mabi=lp64d -O2 990128-1.c QEMU_CPU=rv64,v=true,xventanacondops=true,x-zvfh=true,zfh=true,zba=true,zbb=true,zbc=true,zicond

[Bug target/115995] RISC-V: Can't generate portable RVV code for rv64gcv_zvl512b

2024-07-23 Thread kito at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115995 --- Comment #3 from Kito Cheng --- We have an internal qemu patch for adding an option to trigger this damm behavior by default, and plan to upstream soon...let me ask our Qemu folk if I can get the patch out first.