https://gcc.gnu.org/bugzilla/show_bug.cgi?id=40457
--- Comment #15 from CVS Commits ---
The master branch has been updated by Alexandre Oliva :
https://gcc.gnu.org/g:acddf6665f067bc98a2529a699b1d4509a7387cb
commit r13-5160-gacddf6665f067bc98a2529a699b1d4509a7387cb
Author: Alexandre Oliva
Date:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40457
Ramana Radhakrishnan changed:
What|Removed |Added
Status|NEW |RESOLVED
CC|
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40457
--- Comment #13 from Bernd Schmidt 2010-09-29
20:06:58 UTC ---
Author: bernds
Date: Wed Sep 29 20:06:55 2010
New Revision: 164732
URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=164732
Log:
PR target/40457
* postreload.c (move2add_
--- Comment #12 from bernds at gcc dot gnu dot org 2010-08-02 10:07 ---
Subject: Bug 40457
Author: bernds
Date: Mon Aug 2 10:06:47 2010
New Revision: 162815
URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=162815
Log:
PR target/40457
* config/arm/arm.h (arm_regs_i
--- Comment #11 from bernds at codesourcery dot com 2010-04-20 11:47
---
http://gcc.gnu.org/ml/gcc-patches/2010-04/msg01231.html
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40457
--- Comment #10 from jiez at gcc dot gnu dot org 2010-03-16 09:08 ---
Not working on this.
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jiez at gcc dot gnu dot org changed:
What|Removed |Added
AssignedTo|
--
jiez at gcc dot gnu dot org changed:
What|Removed |Added
AssignedTo|unassigned at gcc dot gnu |jiez at gcc dot gnu dot org
|dot org
--- Comment #9 from ramana at gcc dot gnu dot org 2010-03-02 07:37 ---
Not working on this.
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ramana at gcc dot gnu dot org changed:
What|Removed |Added
Assigned
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ramana at gcc dot gnu dot org changed:
What|Removed |Added
Status|WAITING |ASSIGNED
Last reconfirmed|2009-06-16 10:03:48 |2009-06-19 10
--- Comment #8 from ramana at gcc dot gnu dot org 2009-06-17 09:49 ---
(In reply to comment #7)
> My command line option is -O2 -Os -mthumb
>
> The compiler didn't run into load_multiple_sequence and
> store_multiple_sequence. The peephole rules specified it applies to TARGET_ARM
> only
--- Comment #7 from carrot at google dot com 2009-06-17 09:30 ---
My command line option is -O2 -Os -mthumb
The compiler didn't run into load_multiple_sequence and
store_multiple_sequence. The peephole rules specified it applies to TARGET_ARM
only. Is there any special reason we didn't
--- Comment #6 from rearnsha at arm dot com 2009-06-17 08:40 ---
Subject: Re: use stm and ldm to access consecutive
memory words
> --- Comment #5 from ubizjak at gmail dot com 2009-06-16 18:16 ---
> Registers also need to be consecutive, starting from certain register,
--- Comment #5 from ubizjak at gmail dot com 2009-06-16 18:16 ---
(In reply to comment #2)
> Could you check to see why store_multiple_sequence doesn't find this in the
> peephole in the ARM backend ?
Registers also need to be consecutive, starting from certain register, i.e.:
str
--- Comment #4 from rearnsha at gcc dot gnu dot org 2009-06-16 15:50
---
You haven't specified what compilation options you were using.
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rearnsha at gcc dot gnu dot org changed:
What|Removed |Added
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--- Comment #3 from pinskia at gcc dot gnu dot org 2009-06-16 15:19 ---
I think these peepholes should moved over to peephole2 also if that area is
being touched.
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pinskia at gcc dot gnu dot org changed:
What|Removed |Added
--
--- Comment #2 from ramana at gcc dot gnu dot org 2009-06-16 10:03 ---
Could you check to see why store_multiple_sequence doesn't find this in the
peephole in the ARM backend ?
GCC does generate stm and ldm's in a number of other places using the old
peephole and store_multiple_sequenc
--- Comment #1 from carrot at google dot com 2009-06-16 09:11 ---
Created an attachment (id=18005)
--> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=18005&action=view)
test case
For this function
void foo(int* p)
{
p[0] = 1;
p[1] = 2;
}
gcc generates:
mov r1, #1
mov r3,
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