https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65604
Eric Gallager changed:
What|Removed |Added
Status|WAITING |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65604
Eric Gallager changed:
What|Removed |Added
Status|UNCONFIRMED |WAITING
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65604
Eric Gallager changed:
What|Removed |Added
CC||egallager at gcc dot gnu.org
---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65604
--- Comment #4 from Steve Ellcey ---
Author: sje
Date: Fri Jan 29 16:29:58 2016
New Revision: 232985
URL: https://gcc.gnu.org/viewcvs?rev=232985=gcc=rev
Log:
PR target/65604
* config/mips/mips.c (mips_output_division): Check
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65604
--- Comment #5 from Steve Ellcey ---
Author: sje
Date: Fri Jan 29 16:31:18 2016
New Revision: 232986
URL: https://gcc.gnu.org/viewcvs?rev=232986=gcc=rev
Log:
PR target/65604
* gcc.target/mips/div-delay.c: New test.
Added:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65604
--- Comment #3 from Steve Ellcey ---
I have submitted a patch for this problem.
https://gcc.gnu.org/ml/gcc-patches/2015-12/msg01049.html
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65604
Steve Ellcey changed:
What|Removed |Added
CC||sje at gcc dot gnu.org
--- Comment #1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65604
--- Comment #2 from Andrew Zonenberg ---
Yes, I am compiling for mips1. I'm targeting a size-optimized FPGA softcore
that doesn't have support for the newer opcodes.
Sounds like you've confirmed the bad code generation then?
