https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68924
--- Comment #8 from Uroš Bizjak ---
(In reply to Uroš Bizjak from comment #6)
> Please report this problem in the another PR (it is the case of missing v->r
> alternative in *vec_extractv2di_0_sse pattern for SSE4+, where we can split
> directly
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68924
--- Comment #7 from uros at gcc dot gnu.org ---
Author: uros
Date: Sun Mar 10 22:59:31 2019
New Revision: 269562
URL: https://gcc.gnu.org/viewcvs?rev=269562=gcc=rev
Log:
PR target/68924
* config/i386/sse.md
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68924
Uroš Bizjak changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68924
--- Comment #5 from Uroš Bizjak ---
_mm_loadu_si64 intrinsic can now be used in the example from #Description:
#include
#include
__m256 load_bytes_to_m256(uint8_t *p)
{
__m128i small_load = _mm_loadu_si64( (void *)p );
__m256i intvec =
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68924
--- Comment #4 from uros at gcc dot gnu.org ---
Author: uros
Date: Fri Mar 8 15:53:47 2019
New Revision: 269497
URL: https://gcc.gnu.org/viewcvs?rev=269497=gcc=rev
Log:
PR target/68924
PR target/78782
PR target/87558
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68924
--- Comment #3 from Peter Cordes ---
(In reply to Marc Glisse from comment #2)
> Does anything bad happen if you remove the #ifdef/#endif for
> _mm_cvtsi64_si128? (2 files in the testsuite would need updating for a
> proper patch)
It's just a
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68924
--- Comment #2 from Marc Glisse ---
Does anything bad happen if you remove the #ifdef/#endif for _mm_cvtsi64_si128?
(2 files in the testsuite would need updating for a proper patch)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68924
--- Comment #1 from Peter Cordes ---
There's __m128i _mm_loadl_epi64 (__m128i const*
mem_addr)(https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=movq=5450,4247,3115=SSE2),
which gcc makes available in 32-bit mode.
This does
