https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70008
Bug ID: 70008 Summary: [ARM] Reverse subtract with carry can be generated in thumb2 mode Product: gcc Version: 6.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: michael.collison at linaro dot org Target Milestone: --- The following pattern in arm.md allows the 'rsc' instruction to be generated in thumb2 mode. (define_insn "*subsi3_carryin" [(set (match_operand:SI 0 "s_register_operand" "=r,r") (minus:SI (minus:SI (match_operand:SI 1 "reg_or_int_operand" "r,I") (match_operand:SI 2 "s_register_operand" "r,r")) (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))] "TARGET_32BIT" "@ sbc%?\\t%0, %1, %2 rsc%?\\t%0, %2, %1" TARGET_32BIT includes the thumb2 architecture which does does support the reverse subtract with carry (rsc) instruction. I will post a patch upstream after testing.