[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #19 from Wink Saville --- (In reply to H.J. Lu from comment #18) > (In reply to Wink Saville from comment #17) > > > > > > I assume you were referring to real debugger, like GDB. Spec won't > > > specify > > > where/how/when any

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #18 from H.J. Lu --- (In reply to Wink Saville from comment #17) > > > > I assume you were referring to real debugger, like GDB. Spec won't specify > > where/how/when any register is saved. > > From my perspective the spec defines

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #17 from Wink Saville --- (In reply to H.J. Lu from comment #16) > (In reply to Wink Saville from comment #15) > > (In reply to H.J. Lu from comment #14) > > > (In reply to Wink Saville from comment #13) > > > > > Compiler should be

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #16 from H.J. Lu --- (In reply to Wink Saville from comment #15) > (In reply to H.J. Lu from comment #14) > > (In reply to Wink Saville from comment #13) > > > > Compiler should be free to use rbp in anyway it sees fit. Spec

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #15 from Wink Saville --- (In reply to H.J. Lu from comment #14) > (In reply to Wink Saville from comment #13) > > > Compiler should be free to use rbp in anyway it sees fit. Spec shouldn't > > > say anything other than rbp is

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #14 from H.J. Lu --- (In reply to Wink Saville from comment #13) > > Compiler should be free to use rbp in anyway it sees fit. Spec shouldn't > > say anything other than rbp is special to compiler. > > If the compiler does decide to

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #13 from Wink Saville --- (In reply to H.J. Lu from comment #12) > (In reply to Wink Saville from comment #11) > > > > The rsp is always saved/restored by the hardware, and your struct frame > > > > pointer provides access to it so

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #12 from H.J. Lu --- (In reply to Wink Saville from comment #11) > > > The rsp is always saved/restored by the hardware, and your struct frame > > > pointer provides access to it so no problem there. It is special because > > > when

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #11 from Wink Saville --- (In reply to H.J. Lu from comment #10) > (In reply to Wink Saville from comment #9) > > (In reply to H.J. Lu from comment #8) > > > (In reply to Wink Saville from comment #7) > > > > > > > > In my opinion,

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #10 from H.J. Lu --- (In reply to Wink Saville from comment #9) > (In reply to H.J. Lu from comment #8) > > (In reply to Wink Saville from comment #7) > > > > > > In my opinion, even if rbp is special, it still needs to be available

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #9 from Wink Saville --- (In reply to H.J. Lu from comment #8) > (In reply to Wink Saville from comment #7) > > > > In my opinion, even if rbp is special, it still needs to be available in the > > struct full_stack_frame. > > The

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #8 from H.J. Lu --- (In reply to Wink Saville from comment #7) > > In my opinion, even if rbp is special, it still needs to be available in the > struct full_stack_frame. The whole idea of extending interrupter attribute is to avoid

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #7 from Wink Saville --- (In reply to H.J. Lu from comment #3) > (In reply to Wink Saville from comment #2) > > (In reply to H.J. Lu from comment #1) > > > (In reply to Wink Saville from comment #0) > > > > I have identified one

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #6 from H.J. Lu --- (In reply to Wink Saville from comment #5) > > > > Compiler doesn't use segment registers, except for TLS, which should > > be used in ISR. ISR needs to save and restore any registers, which > > aren't used by

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #5 from Wink Saville --- (In reply to H.J. Lu from comment #4) > (In reply to Wink Saville from comment #0) > > I'm using the new C interrupt attribute for x86 and its working well. But > > when I expanded its use to include handling

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #4 from H.J. Lu --- (In reply to Wink Saville from comment #0) > I'm using the new C interrupt attribute for x86 and its working well. But > when I expanded its use to include handling thread context switches, I found > that its

[Bug target/70220] [x86] interrupt attribute optionally needs to provide read, write and control the set of saved registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70220 --- Comment #3 from H.J. Lu --- (In reply to Wink Saville from comment #2) > (In reply to H.J. Lu from comment #1) > > (In reply to Wink Saville from comment #0) > > > I have identified one possible problem and with this scheme, what if the > >