https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
Jakub Jelinek changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #26 from Jakub Jelinek ---
Author: jakub
Date: Mon Dec 25 11:59:17 2017
New Revision: 255997
URL: https://gcc.gnu.org/viewcvs?rev=255997&root=gcc&view=rev
Log:
PR target/83488
* config/i386/i386.opt (-mavx512vpopcntdq
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #25 from Jakub Jelinek ---
Author: jakub
Date: Fri Dec 22 18:00:41 2017
New Revision: 255979
URL: https://gcc.gnu.org/viewcvs?rev=255979&root=gcc&view=rev
Log:
PR target/83488
* config/i386/avx512vnniintrin.h: Don't c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #24 from igor.v.tsimbalist at intel dot com ---
(In reply to Jakub Jelinek from comment #23)
> (In reply to igor.v.tsimbalist from comment #21)
> > Maybe I did more than expected :). Actually 512VNNI has VL bit according to
> > recentl
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #23 from Jakub Jelinek ---
(In reply to igor.v.tsimbalist from comment #21)
> Maybe I did more than expected :). Actually 512VNNI has VL bit according to
> recently published extension. Please see
>
> https://software.intel.com/sites
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #22 from Jakub Jelinek ---
Ah, that changes the situation, I guess your patch is fine then (but please ask
still Uros or Kirill for approval on gcc-patches). But make sure that the
i386-builtins.def | OPTION_MASK_ISA_AVX512VL additio
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #21 from igor.v.tsimbalist at intel dot com ---
Maybe I did more than expected :). Actually 512VNNI has VL bit according to
recently published extension. Please see
https://software.intel.com/sites/default/files/managed/c5/15/architec
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #20 from Jakub Jelinek ---
(In reply to igor.v.tsimbalist from comment #19)
> Created attachment 42947 [details]
> 512VNNI patch
What is the reason for moving it over? At least right now you don't have any |
OPTION_MASK_ISA_AVX512VL
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #19 from igor.v.tsimbalist at intel dot com ---
Created attachment 42947
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=42947&action=edit
512VNNI patch
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #18 from igor.v.tsimbalist at intel dot com ---
Added a patch for m512vnni, which is done similarly to 512vbmi2. It looks like
most of avx512* bits have to be included in OPTION_MASK_ISA_AVX512F_UNSET. I
leave it to a separate revision
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #17 from Jakub Jelinek ---
Leaving open for the
case OPT_mavx512vnni:
if (value)
{
opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX512VNNI_SET;
opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_A
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #16 from Jakub Jelinek ---
Author: jakub
Date: Thu Dec 21 08:45:30 2017
New Revision: 255937
URL: https://gcc.gnu.org/viewcvs?rev=255937&root=gcc&view=rev
Log:
PR target/83488
* config/i386/i386.c (ix86_target_string)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #15 from igor.v.tsimbalist at intel dot com ---
(In reply to Jakub Jelinek from comment #13)
> And, if we run out of easy move ideas, we could make a copy of the ISA_64BIT
> so that we'd have it in both flag sets (and keep it synced) a
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #14 from igor.v.tsimbalist at intel dot com ---
ok, maybe I was wrong. But my point is OPTION_MASK_ISA_AVX512VL may be used
with new/future instructions likely. This bit is in isa_flags set, which is
full now, so it will require reorde
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #13 from Jakub Jelinek ---
And, if we run out of easy move ideas, we could make a copy of the ISA_64BIT so
that we'd have it in both flag sets (and keep it synced) and move all AVX512
related stuff to isa_flags2 and everything else to
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #12 from Jakub Jelinek ---
If it is due to a bug in i386-builtins.def, with my patch there are just 60
bits in isa_flags and thus a couple of further isa bits could be moved there if
really needed. And as I said earlier, I think it i
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #11 from Jakub Jelinek ---
$ grep 'OPTION_MASK_ISA_AVX512VNNI.*|' i386-builtins.def
$ grep '|.*OPTION_MASK_ISA_AVX512VNNI' i386-builtins.def
So, at least I can't find that.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #10 from igor.v.tsimbalist at intel dot com ---
The bit OPTION_MASK_ISA_AVX512VNNI may have OPTION_MASK_ISA_AVX512VL bit set
also. But these bits are from different isa flags.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
Jakub Jelinek changed:
What|Removed |Added
CC||kyukhin at gcc dot gnu.org,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #8 from Jakub Jelinek ---
(In reply to igor.v.tsimbalist from comment #6)
> I haven't look into all the cases but I think there are similar cases with
> OPTION_MASK_ISA_AVX512F and OPTION_MASK_ISA_AVX512VL.
Which ones do you mean?
W
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #7 from Jakub Jelinek ---
Testcase for the other ICE fixed by this patch:
/* { dg-do compile } */
/* { dg-options "-mavx512vbmi2 -mno-avx512f" } */
typedef long long __v8di __attribute__((vector_size (64)));
void
foo (__v8di *a, __v
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #6 from igor.v.tsimbalist at intel dot com ---
I haven't look into all the cases but I think there are similar cases with
OPTION_MASK_ISA_AVX512F and OPTION_MASK_ISA_AVX512VL.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #5 from Jakub Jelinek ---
The "The patch has a fix for wrong setting of OPTION_MASK_ISA_AVX512F_SET for
-mavx512vnni option, which has also effect on CET." part of the patch is still
needed, please submit it separately. And if you do
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #4 from Jakub Jelinek ---
Created attachment 42932
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=42932&action=edit
gcc8-pr83488.patch
Untested fix. Note I think the patch should also fix -mavx512vbmi2
-mno-avx512f not disabli
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #3 from Jakub Jelinek ---
Working on a patch that moves HLE, MOVBE, CLZERO and MWAITX to isa_flags2 and
VBMI2 and SHSTK to isa_flags. The rule of thumb is that if some isa mask
option appears with |, then either all the ored options
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
Jakub Jelinek changed:
What|Removed |Added
Status|UNCONFIRMED |ASSIGNED
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #2 from igor.v.tsimbalist at intel dot com ---
Created attachment 42930
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=42930&action=edit
patch
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
--- Comment #1 from igor.v.tsimbalist at intel dot com ---
The reason of this ICE is not in CET implementation itself, it's an induced
error. The actual reason is in keeping isa bits. There are two different flags
to keep ISA bits (for i386): x86_
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83488
Richard Biener changed:
What|Removed |Added
Target||x86_64-linux-gnu
Version|unk
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