https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88541
--- Comment #7 from Jakub Jelinek ---
Author: jakub
Date: Tue Jan 8 10:24:56 2019
New Revision: 267712
URL: https://gcc.gnu.org/viewcvs?rev=267712&root=gcc&view=rev
Log:
Backported from mainline
2018-12-19 Jakub Jelinek
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88541
--- Comment #6 from Jakub Jelinek ---
Because AVX was what is in i386-builtins.def already and as the testcase shows,
it works with just -mavx. You can not just load/store those vectors, you can
also do logical operations on them etc. (through t
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88541
--- Comment #5 from jbeulich at novell dot com ---
So why -mavx instead of -mavx2? I think the way it was done for GFNI and SSE2
it should also be done there, here and for VAES wrt AVX: Only SSE2 provides
support for vectors of ints. Similarly onl
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88541
Jakub Jelinek changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88541
--- Comment #3 from Jakub Jelinek ---
Author: jakub
Date: Wed Dec 19 08:31:16 2018
New Revision: 267254
URL: https://gcc.gnu.org/viewcvs?rev=267254&root=gcc&view=rev
Log:
PR target/88541
* config/i386/vpclmulqdqintrin.h (_mm256_c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88541
--- Comment #2 from Jakub Jelinek ---
But looking at 319433-030.pdf there indeed is a VEX encoded insn that just
needs VPCLMULQDQ ISA and i386-builtins.def has that same requirement (avx +
vpclmulqdq). Testing a patch.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88541
Jakub Jelinek changed:
What|Removed |Added
CC||jakub at gcc dot gnu.org
--- Comment #1
