https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98478
--- Comment #4 from Hongtao.liu ---
Arm implemented vector boolean mode in
https://gcc.gnu.org/pipermail/gcc-patches/2021-October/581534.html
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98478
--- Comment #1 from Hongtao.liu ---
according to sve-ieee-micro-2017.pdf predicate registers is
Each predicate consists ofeight enable bits per 64-bit vector element, allowing
down to per byte-granularity. For any given element size only the
le
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98478
--- Comment #2 from Hongtao.liu ---
> predicates register are much more like vector mask in avx2, but not integer
> mask in avx512.
So avx512 integer mask may not suitable to be represented by VnBImode.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98478
Jakub Jelinek changed:
What|Removed |Added
CC||jakub at gcc dot gnu.org
--- Comment #3
