[Bug target/98698] New: atomic load to FPU registers

[glisse at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98698

            Bug ID: 98698
           Summary: atomic load to FPU registers
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: glisse at gcc dot gnu.org
  Target Milestone: ---
            Target: x86_64-*-*

#include <atomic>
std::atomic<double> a;
double f(){ return a.load(std::memory_order_relaxed); }

is compiled by g++ to

        movq    a(%rip), %rax
        movq    %rax, %xmm0
        ret

As far as I understand, a direct movsd to xmm0 would still be atomic, and
that's indeed what llvm outputs.