https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
Rainer Orth changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #17 from Richard Biener ---
Ok, same issues as 32-bit. So it should be fine to change sparc to vect64 now.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #16 from Rainer Orth ---
Created attachment 34550
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=34550&action=edit
64-bit sparc bb-slp-26.c.129t.slp1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #15 from Rainer Orth ---
Created attachment 34549
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=34549&action=edit
64-bit sparc bb-slp-11.c.135t.slp2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #14 from ro at CeBiTec dot Uni-Bielefeld.DE ---
> --- Comment #12 from Richard Biener ---
[...]
>> I'm attaching the 32-bit slp? dumps for reference.
>
> So 64-bit works fine?
Unfortunately not. I'll attach the dumps, too.
Rai
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #13 from Richard Biener ---
Author: rguenth
Date: Fri Jan 23 13:08:32 2015
New Revision: 220039
URL: https://gcc.gnu.org/viewcvs?rev=220039&root=gcc&view=rev
Log:
2015-01-23 Richard Biener
PR testsuite/63439
* gcc.dg/vect
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #12 from Richard Biener ---
(In reply to r...@cebitec.uni-bielefeld.de from comment #8)
> > --- Comment #5 from Richard Biener ---
> [...]
> > For SPARC we use v8qi and peel for alignment. That should be handled
> > but it looks lik
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #11 from ro at CeBiTec dot Uni-Bielefeld.DE ---
> --- Comment #7 from Richard Biener ---
[...]
> which means it is unconditionally vect64 (I assume word_mode is DImode).
Unless I'm completely mistaken, word_mode is SImode for 32-bit
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #10 from Rainer Orth ---
Created attachment 34547
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=34547&action=edit
32-bit sparc bb-slp-26.c.129t.slp1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #8 from ro at CeBiTec dot Uni-Bielefeld.DE ---
> --- Comment #5 from Richard Biener ---
[...]
> For SPARC we use v8qi and peel for alignment. That should be handled
> but it looks like SPARC is not vect64 for whatever reason :/
>
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #9 from Rainer Orth ---
Created attachment 34546
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=34546&action=edit
32-bit sparc bb-slp-11.c.135t.slp2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #7 from Richard Biener ---
So SPARC has
static machine_mode
sparc_preferred_simd_mode (machine_mode mode)
{
if (TARGET_VIS)
switch (mode)
{
case SImode:
return V2SImode;
case HImode:
return V4H
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #6 from Richard Biener ---
Author: rguenth
Date: Fri Jan 23 11:00:10 2015
New Revision: 220033
URL: https://gcc.gnu.org/viewcvs?rev=220033&root=gcc&view=rev
Log:
2015-01-23 Richard Biener
PR testsuite/63439
* gcc.dg/vect/
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #5 from Richard Biener ---
So arm uses v16qi, but:
/* { dg-final { scan-tree-dump "Alignment of access forced using peeling"
"vect" { target { vector_alignment_reachable && vect64 } } } } */
so arm also is vect64 (v16qi is 128 bits)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
--- Comment #4 from Rainer Orth ---
Created attachment 34530
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=34530&action=edit
sparc vectorizer dump
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63439
Richard Biener changed:
What|Removed |Added
Target Milestone|--- |5.0
Summary|FAIL: gcc.dg/vec
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