[gcc r14-10289] arm: Fix CASE_VECTOR_SHORTEN_MODE for thumb2.

2024-06-07 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:ca1924947b5bed8105ae020bef6950bddda448f3 commit r14-10289-gca1924947b5bed8105ae020bef6950bddda448f3 Author: Richard Ball Date: Thu Jun 6 16:10:14 2024 +0100 arm: Fix CASE_VECTOR_SHORTEN_MODE for thumb2. The CASE_VECTOR_SHORTEN_MODE query is missing some

[gcc r14-10285] aarch64: Add missing ACLE macro for NEON-SVE Bridge

2024-06-06 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:35ed54f136fe63bd04d48ada6efb305457bbd824 commit r14-10285-g35ed54f136fe63bd04d48ada6efb305457bbd824 Author: Richard Ball Date: Thu Jun 6 16:28:00 2024 +0100 aarch64: Add missing ACLE macro for NEON-SVE Bridge __ARM_NEON_SVE_BRIDGE was missed in the original

[gcc r15-1075] aarch64: Add missing ACLE macro for NEON-SVE Bridge

2024-06-06 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:43530bc40b1d0465911e493e56a6631202ce85b1 commit r15-1075-g43530bc40b1d0465911e493e56a6631202ce85b1 Author: Richard Ball Date: Thu Jun 6 16:28:00 2024 +0100 aarch64: Add missing ACLE macro for NEON-SVE Bridge __ARM_NEON_SVE_BRIDGE was missed in the original

[gcc r15-1074] arm: Fix CASE_VECTOR_SHORTEN_MODE for thumb2.

2024-06-06 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:2963c76e8e24d4ebaf2b1b4ac4d7ca44eb0a9025 commit r15-1074-g2963c76e8e24d4ebaf2b1b4ac4d7ca44eb0a9025 Author: Richard Ball Date: Thu Jun 6 16:10:14 2024 +0100 arm: Fix CASE_VECTOR_SHORTEN_MODE for thumb2. The CASE_VECTOR_SHORTEN_MODE query is missing some

[gcc r13-8678] ifcvt: Don't lower bitfields with non-constant offsets [PR 111882]

2024-05-03 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:4950f6bcd3cce9deb630b76af42cd6d6968ba03f commit r13-8678-g4950f6bcd3cce9deb630b76af42cd6d6968ba03f Author: Andre Vieira Date: Fri Oct 20 17:02:32 2023 +0100 ifcvt: Don't lower bitfields with non-constant offsets [PR 111882] This patch stops lowering of

[gcc r12-10410] tree-optimization/114672 - WIDEN_MULT_PLUS_EXPR type mismatch

2024-05-02 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:87e37c72cfb153d65ac8b26d6f2d1fe155818318 commit r12-10410-g87e37c72cfb153d65ac8b26d6f2d1fe155818318 Author: Richard Biener Date: Wed Apr 10 10:33:40 2024 +0200 tree-optimization/114672 - WIDEN_MULT_PLUS_EXPR type mismatch The following makes sure to restrict

[gcc r13-8676] tree-optimization/114672 - WIDEN_MULT_PLUS_EXPR type mismatch

2024-05-02 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:0d625dc1bffd885b04eb90ff48a6d34acacc3e0b commit r13-8676-g0d625dc1bffd885b04eb90ff48a6d34acacc3e0b Author: Richard Biener Date: Wed Apr 10 10:33:40 2024 +0200 tree-optimization/114672 - WIDEN_MULT_PLUS_EXPR type mismatch The following makes sure to restrict

[gcc r12-10397] aarch64: Fix SCHEDULER_IDENT for Cortex-A510

2024-04-26 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:751a0f54345b7e037db7f0389c19c1f87e0ae4de commit r12-10397-g751a0f54345b7e037db7f0389c19c1f87e0ae4de Author: Richard Ball Date: Fri Apr 26 18:21:07 2024 +0100 aarch64: Fix SCHEDULER_IDENT for Cortex-A510 The SCHEDULER_IDENT for this CPU was incorrectly

[gcc r13-8654] aarch64: Fix SCHEDULER_IDENT for Cortex-A510

2024-04-26 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:28b3b8a2fe55521a43f3710cf6ced1ab63f1ea03 commit r13-8654-g28b3b8a2fe55521a43f3710cf6ced1ab63f1ea03 Author: Richard Ball Date: Fri Apr 26 18:15:23 2024 +0100 aarch64: Fix SCHEDULER_IDENT for Cortex-A510 The SCHEDULER_IDENT for this CPU was incorrectly set

[gcc r11-11364] arm: Zero/Sign extends for CMSE security

2024-04-25 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:dabd742cc25f8992c24e639510df0965dbf14f21 commit r11-11364-gdabd742cc25f8992c24e639510df0965dbf14f21 Author: Richard Ball Date: Thu Apr 25 15:30:42 2024 +0100 arm: Zero/Sign extends for CMSE security Co-Authored by: Andre Simoes Dias Vieira This

[gcc r12-10394] arm: Zero/Sign extends for CMSE security

2024-04-25 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:441e194abcf3211de647d74c892f90879ae9ca8c commit r12-10394-g441e194abcf3211de647d74c892f90879ae9ca8c Author: Richard Ball Date: Thu Apr 25 15:30:42 2024 +0100 arm: Zero/Sign extends for CMSE security Co-Authored by: Andre Simoes Dias Vieira This

[gcc r13-8647] arm: Zero/Sign extends for CMSE security

2024-04-25 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:5550214b58e95320b54e42ef0e37c6479e04b27b commit r13-8647-g5550214b58e95320b54e42ef0e37c6479e04b27b Author: Richard Ball Date: Thu Apr 25 15:30:42 2024 +0100 arm: Zero/Sign extends for CMSE security Co-Authored by: Andre Simoes Dias Vieira This

[gcc r14-10122] arm: Zero/Sign extends for CMSE security

2024-04-25 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:ad45086178d833254d66fab518b14234418f002b commit r14-10122-gad45086178d833254d66fab518b14234418f002b Author: Richard Ball Date: Thu Apr 25 15:30:42 2024 +0100 arm: Zero/Sign extends for CMSE security Co-Authored by: Andre Simoes Dias Vieira This

[gcc r14-9875] aarch64: Fix ACLE SME streaming mode error in neon-sve-bridge

2024-04-09 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:685d822e524cc8b2726ad6c44c2ccaabe55a198c commit r14-9875-g685d822e524cc8b2726ad6c44c2ccaabe55a198c Author: Richard Ball Date: Tue Apr 9 16:31:35 2024 +0100 aarch64: Fix ACLE SME streaming mode error in neon-sve-bridge When using LTO, handling the pragma for

gcc-wwwdocs branch master updated. 7cd7e13e443da8e2aae389fa30eb547530c6e2c8

2024-04-08 Thread Richard Ball via Gcc-cvs-wwwdocs
This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "gcc-wwwdocs". The branch, master has been updated via 7cd7e13e443da8e2aae389fa30eb547530c6e2c8 (commit) from

[gcc r14-9672] aarch64: Fix SCHEDULER_IDENT for Cortex-A510 and Cortex-A520

2024-03-26 Thread Richard Ball via Gcc-cvs
https://gcc.gnu.org/g:cab53aae43cf94171b01320c08302e47a5daa391 commit r14-9672-gcab53aae43cf94171b01320c08302e47a5daa391 Author: Richard Ball Date: Tue Mar 26 13:54:31 2024 + aarch64: Fix SCHEDULER_IDENT for Cortex-A510 and Cortex-A520 The SCHEDULER_IDENT for these two CPUs