https://gcc.gnu.org/g:ebef2cea73f63e836c2a818e5fc0bb3dd03161e2
commit ebef2cea73f63e836c2a818e5fc0bb3dd03161e2
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Sat Jun 22 04:47:51 2024 -0400
Delete -mlrspr, -mintspr, -mfpspr
2024-06-21 Michael Meissner <meiss...@linux.ibm.com>
* config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
Delete
-mlrspr, -mintspr, and -mfpspr.
(rs6000_debug_reg_global): Likewise.
* config/rs6000/rs6000.opt (-mlrspr): Delete.
(-mintspr): Likewise.
(-mfpspr): Likewise.
Diff:
---
gcc/config/rs6000/rs6000.cc | 26 +++++++++++---------------
gcc/config/rs6000/rs6000.opt | 12 ------------
2 files changed, 11 insertions(+), 27 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index ca551451060..d96adf12c5d 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -1949,10 +1949,6 @@ rs6000_hard_regno_mode_ok_uncached (int regno,
machine_mode mode)
return (!orig_complex_p && mode == SImode);
case LR_REGNO:
- if (!TARGET_LRSPR)
- return (!orig_complex_p && mode == Pmode);
- /* fall through. */
-
case CTR_REGNO:
case TAR_REGNO:
if (orig_complex_p)
@@ -1964,22 +1960,22 @@ rs6000_hard_regno_mode_ok_uncached (int regno,
machine_mode mode)
switch (mode)
{
case E_QImode:
- return (TARGET_QISPR || TARGET_INTSPR);
+ return TARGET_QISPR != 0;
case E_HImode:
- return (TARGET_HISPR || TARGET_INTSPR);
+ return TARGET_HISPR != 0;
case E_SImode:
- return (TARGET_SISPR || TARGET_INTSPR || !TARGET_POWERPC64);
+ return TARGET_SISPR || !TARGET_POWERPC64;
case E_DImode:
- return TARGET_POWERPC64;
+ return TARGET_POWERPC64 != 0;
case E_SFmode:
- return (TARGET_SFSPR || TARGET_FPSPR);
+ return TARGET_SFSPR != 0;
case E_DFmode:
- return ((TARGET_DFSPR || TARGET_FPSPR) && TARGET_POWERPC64);
+ return TARGET_DFSPR && TARGET_POWERPC64;
default:
break;
@@ -2654,22 +2650,22 @@ rs6000_debug_reg_global (void)
TARGET_CCSPR ? "yes" : "no");
fprintf (stderr, DEBUG_FMT_S, "QImode in SPR",
- (TARGET_QISPR || TARGET_INTSPR) ? "yes" : "no");
+ TARGET_QISPR ? "yes" : "no");
fprintf (stderr, DEBUG_FMT_S, "HImode in SPR",
- TARGET_HISPR || TARGET_INTSPR ? "yes" : "no");
+ TARGET_HISPR ? "yes" : "no");
fprintf (stderr, DEBUG_FMT_S, "SImode in SPR",
- TARGET_SISPR || TARGET_INTSPR || !TARGET_POWERPC64 ? "yes" : "no");
+ TARGET_SISPR || !TARGET_POWERPC64 ? "yes" : "no");
fprintf (stderr, DEBUG_FMT_S, "DImode in SPR",
TARGET_POWERPC64 ? "yes" : "no");
fprintf (stderr, DEBUG_FMT_S, "SFmode in SPR",
- TARGET_SFSPR || TARGET_FPSPR ? "yes" : "no");
+ TARGET_SFSPR ? "yes" : "no");
fprintf (stderr, DEBUG_FMT_S, "DFmode in SPR",
- TARGET_DFSPR || TARGET_FPSPR ? "yes" : "no");
+ TARGET_DFSPR ? "yes" : "no");
}
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index b4b6dc8fa9c..27f873972b5 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -650,10 +650,6 @@ msispr
Target Undocumented Var(TARGET_SISPR) Init(1)
Allow (do not allow) 32-bit integers to be in the CTR or TAR registers.
-mintspr
-Target Undocumented Var(TARGET_INTSPR) Init(0)
-Allow (do not allow) small integers to be in the CTR or TAR registers.
-
msfspr
Target Undocumented Var(TARGET_SFSPR) Init(0)
Allow (do not allow) 32-bit floating point to be in the CTR or TAR registers.
@@ -662,14 +658,6 @@ mdfspr
Target Undocumented Var(TARGET_DFSPR) Init(0)
Allow (do not allow) 64-bit floating point to be in the CTR or TAR registers.
-mfpspr
-Target Undocumented Var(TARGET_FPSPR) Init(0)
-Allow (do not allow) floating point values to be in the CTR or TAR registers.
-
-mlrspr
-Target Undocumented Var(TARGET_LRSPR) Init(1)
-Treat (do not treat) the LR register like CTR/TAR in terms of what modes it
can hold.
-
; Documented parameters
-param=rs6000-vect-unroll-limit=
