https://gcc.gnu.org/g:dc51a6428f6d8e5a57b8b1bf559145288e87660b

commit r14-9930-gdc51a6428f6d8e5a57b8b1bf559145288e87660b
Author: Pan Li <pan2...@intel.com>
Date:   Fri Apr 12 11:12:24 2024 +0800

    RISC-V: Bugfix ICE non-vector in TARGET_FUNCTION_VALUE_REGNO_P
    
    This patch would like to fix one ICE when vector is not enabled
    in hook TARGET_FUNCTION_VALUE_REGNO_P implementation.  The vector
    regno is available if and only if the TARGET_VECTOR is true.  The
    previous implement missed this condition and then result in ICE
    when rv64gc build option without vector.
    
    The below test suite is passed for this patch.
    
    * The rv64gcv fully regression tests.
    * The rv64gc fully regression tests.
    
            PR target/114639
    
    gcc/ChangeLog:
    
            * config/riscv/riscv.cc (riscv_function_value_regno_p): Add
            TARGET_VECTOR predicate for V_RETURN regno.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/pr114639-1.c: New test.
            * gcc.target/riscv/pr114639-2.c: New test.
            * gcc.target/riscv/pr114639-3.c: New test.
            * gcc.target/riscv/pr114639-4.c: New test.
    
    Signed-off-by: Pan Li <pan2...@intel.com>

Diff:
---
 gcc/config/riscv/riscv.cc                   |  2 +-
 gcc/testsuite/gcc.target/riscv/pr114639-1.c | 11 +++++++++++
 gcc/testsuite/gcc.target/riscv/pr114639-2.c | 11 +++++++++++
 gcc/testsuite/gcc.target/riscv/pr114639-3.c | 11 +++++++++++
 gcc/testsuite/gcc.target/riscv/pr114639-4.c | 11 +++++++++++
 5 files changed, 45 insertions(+), 1 deletion(-)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 91f017dd52a..e5f00806bb9 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -11008,7 +11008,7 @@ riscv_function_value_regno_p (const unsigned regno)
   if (FP_RETURN_FIRST <= regno && regno <= FP_RETURN_LAST)
     return true;
 
-  if (regno == V_RETURN)
+  if (TARGET_VECTOR && regno == V_RETURN)
     return true;
 
   return false;
diff --git a/gcc/testsuite/gcc.target/riscv/pr114639-1.c 
b/gcc/testsuite/gcc.target/riscv/pr114639-1.c
new file mode 100644
index 00000000000..f41723193a4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr114639-1.c
@@ -0,0 +1,11 @@
+/* Test that we do not have ice when compile */
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -std=gnu89 -O3" } */
+
+g (a, b) {}
+
+f (xx)
+     void* xx;
+{
+  __builtin_apply ((void*)g, xx, 200);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/pr114639-2.c 
b/gcc/testsuite/gcc.target/riscv/pr114639-2.c
new file mode 100644
index 00000000000..0c402c4b254
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr114639-2.c
@@ -0,0 +1,11 @@
+/* Test that we do not have ice when compile */
+/* { dg-do compile } */
+/* { dg-options "-march=rv64imac -mabi=lp64 -std=gnu89 -O3" } */
+
+g (a, b) {}
+
+f (xx)
+     void* xx;
+{
+  __builtin_apply ((void*)g, xx, 200);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/pr114639-3.c 
b/gcc/testsuite/gcc.target/riscv/pr114639-3.c
new file mode 100644
index 00000000000..ffb0d6d162d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr114639-3.c
@@ -0,0 +1,11 @@
+/* Test that we do not have ice when compile */
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gc -mabi=ilp32d -std=gnu89 -O3" } */
+
+g (a, b) {}
+
+f (xx)
+     void* xx;
+{
+  __builtin_apply ((void*)g, xx, 200);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/pr114639-4.c 
b/gcc/testsuite/gcc.target/riscv/pr114639-4.c
new file mode 100644
index 00000000000..a6e229101ef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr114639-4.c
@@ -0,0 +1,11 @@
+/* Test that we do not have ice when compile */
+/* { dg-do compile } */
+/* { dg-options "-march=rv32imac -mabi=ilp32 -std=gnu89 -O3" } */
+
+g (a, b) {}
+
+f (xx)
+     void* xx;
+{
+  __builtin_apply ((void*)g, xx, 200);
+}

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