Hi,
this is Jiangning Liu's patch to fix PR38644 in ARM back-end
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38644.
intended for the GCC 4.6 branch. Test results:
http://gcc.gnu.org/ml/gcc-testresults/2011-11/msg01619.html
--
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr.
On 11/08/2011 09:05 AM, Sebastian Huber wrote:
On 10/31/2011 11:39 AM, Sebastian Huber wrote:
On 10/25/2011 06:56 PM, Richard Earnshaw wrote:
On 24/10/11 14:30, Sebastian Huber wrote:
Hello,
what about the attached patch based on the original patch provided by Bernd
Schmidt with
This patch backports the upstream fix in r171347 for a problem caused by
change in volatile bitfield access. This is tested by building the
x86 toolchain with tests and checking that volatile bitfield access worked
on ARM. This is a backport for 4.6 only.
2011-11-16 Doug Kwan
On 11/15/2011 11:31 PM, Maxim Kuvyrkov wrote:
I have eye-balled this patch for good half-an-hour and couldn't poke any
holes in it. I can't approve this patch, but below are some review comments.
Mostly these are suggested comments to make reload easier to understand for
future
On Fri, Nov 11, 2011 at 6:56 AM, Jeff Law l...@redhat.com wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 11/08/11 06:45, Richard Guenther wrote:
This should optimize VEC_BASE that Jakub was patching by teaching
phiopt to handle some one-statement intermediate basic-blocks.
Eric,
I will follow up while Ilya is on vacation.
I can see only one patch along the dicussion so I will use it, making
changes to follow phase renaming and documentation?
I am covered by FSF agreement too, on the same Intel's list as Ilya.
regards,
Sergos
On Fri, Nov 11, 2011 at 2:12 PM,
On Nov 9, 2011, at 18:15 , Olivier Hainque wrote:
I'm not convinced that the potential gain is worth the extra
complexity and potential risk of running into another subtle
subcase, with hard to track sporadic runtime failures for
starters. I don't have numbers though.
That's a port
On 15/11/11 16:17, Matthew Gretton-Dann wrote:
All,
The attached patch causes libgcc to use the UDIV and SDIV instructions
when possible in the implementation of the ARM div/mod functions in libgcc.
This will benefit Cortex-M3, Cortex-M4, all Cortex-R* CPUs, Cortex-A7,
and Cortex-A15.
Hi,
this is an ICE on valid, 4.6/4.7 Regression, which manifests itself as
tree codes unhandled by cxx_eval_constant_expression. The patchlet below
appears to fix the issue and passes testing on x86_64-linux.
Ok for mainline? Branch too?
Thanks,
Paolo.
/cp
On Wed, Nov 16, 2011 at 03:51, Doug Kwan dougk...@google.com wrote:
This patch backports the upstream fix in r171347 for a problem caused by
change in volatile bitfield access. This is tested by building the
x86 toolchain with tests and checking that volatile bitfield access worked
on ARM.
On Wed, Nov 16, 2011 at 9:00 AM, Paolo Carlini paolo.carl...@oracle.com wrote:
Hi,
this is an ICE on valid, 4.6/4.7 Regression, which manifests itself as tree
codes unhandled by cxx_eval_constant_expression. The patchlet below appears
to fix the issue and passes testing on x86_64-linux.
Ok
On Wed, Nov 16, 2011 at 6:54 AM, Olivier Hainque hain...@adacore.com wrote:
On Nov 9, 2011, at 18:15 , Olivier Hainque wrote:
I'm not convinced that the potential gain is worth the extra
complexity and potential risk of running into another subtle
subcase, with hard to track sporadic runtime
Pr 51102 points out that a newish DR added these two macros into the
standard.
Bootstrapped and no new regressions. Checking in as trivial.
Andrew
* include/bits/atomic_base.h (ATOMIC_BOOL_LOCK_FREE,
ATOMIC_POINTER_LOCK_FREE): New. Add missing macros.
Index:
What do you suggest, a bug report per failure with nothing but the
directory/name of the test?
I'd say a bug report for each distinct failure. It can get awful
confusing when there's multiple bugs in a single PR...
Done. PR numbers below.
There is no trans-mem or libitm component, so I
On 16/11/11 08:51, Doug Kwan wrote:
This patch backports the upstream fix in r171347 for a problem caused by
change in volatile bitfield access. This is tested by building the
x86 toolchain with tests and checking that volatile bitfield access worked
on ARM. This is a backport for 4.6 only.
On Tue, Nov 15, 2011 at 8:23 PM, Uros Bizjak ubiz...@gmail.com wrote:
Attached patch optimizes v2df (x2) - v4sf,v4si conversion sequences
for AVX from:
vroundpd $1, 32(%rsp), %xmm1
vroundpd $1, 48(%rsp), %xmm0
vcvttpd2dqx %xmm1, %xmm1
libitm failed to build on Solaris 8 and 9/x86 with the native assembler,
which lacks support for .hidden. The following patch deals with that by
explicitly using the PIC code sequence, as inspired by
libffi/src/x86/sysv.S. It allows libitm to build on i386-pc-solaris2.8,
and testsuite results
This patch fixes part of PR other/51174.
rs6000_xcoff_section_type_flags() can be called with a NULL decl.
This feature only was used on ELF paths which never called this XCOFF
function.
Bootstrapped on powerpc-ibm-aix5.3.0.0.
- David
* config/rs6000/rs6000.c
On 11/16/2011 08:31 AM, Rainer Orth wrote:
2011-11-16 Rainer Orth r...@cebitec.uni-bielefeld.de
* lib/gcc-simulate-thread.exp (simulate-thread): Skip on
alpha*-*-*.
Ok.
r~
On 11/16/2011 08:28 AM, Rainer Orth wrote:
2011-11-16 Rainer Orth r...@cebitec.uni-bielefeld.de
* alloc_cpp.cc [__osf__] (_ZnwX, _ZdlPv, _ZnaX, _ZdaPv,
_ZnwXRKSt9nothrow_t, _ZdlPvRKSt9nothrow_t, _ZdaPvRKSt9nothrow_t):
Dummy functions.
* eh_cpp.cc [__osf__]
Here is a revised version of the patch. It still fails when combined
with transaction expressions (noexcept-4.C and noexcept-1.C) because
gimplify_must_not_throw_expr() calls voidify_wrapper_expr() on a
MUST_NOT_THROW_EXPR which it doesn't know to be a wrapper. What's the
cleanest way to solve
On 11/16/2011 08:38 AM, Rainer Orth wrote:
* config/generic/asmcfi.h: Fix comment.
* config/x86/sjlj.S (_ITM_beginTransaction): Provide PIC code
sequence without .hidden support.
(GTM_longjmp) [__ELF__]: Only use .hidden if
HAVE_ATTRIBUTE_VISIBILITY.
Nearly ok.
On 16 Nov 2011, at 19:12, Richard Henderson wrote:
On 11/16/2011 08:38 AM, Rainer Orth wrote:
* config/generic/asmcfi.h: Fix comment.
* config/x86/sjlj.S (_ITM_beginTransaction): Provide PIC code
sequence without .hidden support.
(GTM_longjmp) [__ELF__]: Only
On 11/15/2011 02:35 PM, Joseph S. Myers wrote:
2011-11-15 Joseph Myers jos...@codesourcery.com
* config/i386/i386elf.h (PREFERRED_DEBUGGING_TYPE): Remove.
Ok.
r~
Thanks Richard. I will wait for that patch.
-Doug
On Wed, Nov 16, 2011 at 8:41 AM, Richard Earnshaw rearn...@arm.com wrote:
On 16/11/11 08:51, Doug Kwan wrote:
This patch backports the upstream fix in r171347 for a problem caused by
change in volatile bitfield access. This is tested by
Paul Richard Thomas wrote:
I think that a comment is in order every time that you exploit the
upper/lower case distinction.
OK for trunk.
Thanks for the review and thanks for the comment.
I have now added some comments to symbol.c's gfc_undo_symbols, decl.c's
gfc_match_decl_type_spec and
I have committed the following patch for
http://gcc.gnu.org/gcc-4.7/changes.html#fortran
Changes
- Link F2003/F2008 sections to the wiki which gives the implementation
status
- Update backtrace information (Janne's changes from
http://gcc.gnu.org/wiki/GFortran#GCC4.7)
- Mention the just
On 11/16/2011 12:10 PM, Andrew MacLeod wrote:
* builtins.c (expand_builtin): Remove 4th parameter representing
weak/strong mode when __atomic_compare_exchange becomes a library call.
testsuite
* gcc.dg/atomic-generic-aux.c (__atomic_compare_exchange): Fail if
Fix a regression introduced in r180971. Only applicable to LIPO.
For google branch only.
Tested with internal benchmark suite.
Thanks,
-Rong
2011-11-16 Rong Xu x...@google.com
* gcc/dwarf2out.c: use TYPE_CONTEXT to get the context for types.
Index: gcc/dwarf2out.c
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