Matt Turner matts...@gmail.com writes:
The r4600_imul and r4600_idiv reservations were correct for si, but
there were no *_di reservations.
See page 4 of
http://www.sgistuff.net/hardware/other/documents/R4600_Prod_OV.pdf
2012-02-24 Matt Turner matts...@gmail.com
*
On Fri, Feb 24, 2012 at 9:19 PM, H.J. Lu hongjiu...@intel.com wrote:
This patches enables *movabsmode_1 and *movabsmode_2 only for
TARGET_LP64 since x32 doesn't need 64bit address. OK for trunk?
Thanks.
H.J.
---
2012-02-24 H.J. Lu hongjiu...@intel.com
PR target/52352
*
2012/2/24 Georg-Johann Lay a...@gjlay.de:
http://gcc.gnu.org/ml/gcc-patches/2012-02/msg00956.html
Georg-Johann Lay wrote:
Spill failure PR52148 occurs for movmem insn that allocates 2 of AVR's 3
pointer registers. Register allocator is at it's limits and the patch tries
to
cure the
2012/2/24 Georg-Johann Lay a...@gjlay.de:
http://gcc.gnu.org/ml/gcc-patches/2012-02/msg00843.html
Georg-Johann Lay wrote:
This patch introduces a new file builtins.def that is used as central
registry
to hold built-ins' information.
The file is used by defining DEF_BUILTIN macre and then
On 2012.02.23 at 15:31 +0100, Richard Guenther wrote:
On Thu, 23 Feb 2012, Jakub Jelinek wrote:
Hi!
IMHO we should treat CLOBBER stmts in various places like debug stmts,
they shouldn't affect the decisions of the optimization phases, but
if the pass does some transformation that
On Feb 19, 2012, Richard Sandiford rdsandif...@googlemail.com wrote:
I have to admit I still don't like these changes
I'd much rather we kept to the original dag.
I'm not sure I mentioned before, but it remains a DAG unless
cselib_add_permanent_equiv is called. Only var-tracking calls it, and
Denis Chertykov schrieb:
2012/2/24 Georg-Johann Lay:
http://gcc.gnu.org/ml/gcc-patches/2012-02/msg00956.html
Georg-Johann Lay wrote:
Spill failure PR52148 occurs for movmem insn that allocates 2 of AVR's 3
pointer registers. Register allocator is at it's limits and the patch tries to
cure
2012/2/25 Georg-Johann Lay a...@gjlay.de:
[...]
The pattern for the address spaces is now as simple as
;; $0 : Address Space
;; $1 : RAMPZ RAM address
;; R24 : #bytes and loop register
;; R23:Z : 24-bit source address
;; R26 : 16-bit destination address
;; movmemx_qi
;;
Georg-Johann Lay schrieb:
This patch addresses several issues related to device flash size:
* cores avrxmega4/5 have ELPM* instruction
* flash sizes for xmega were wrong because atxmegaXX
has some extra bootloader flash and thus a flash size
of XX + epsilon.
* There are devices with
Tested on hppa2.0w-hp-hpux11.11. Committed to trunk.
Dave
--
J. David Anglin dave.ang...@nrc-cnrc.gc.ca
National Research Council of Canada (613) 990-0752 (FAX: 952-6602)
2012-02-25 John David Anglin dave.ang...@nrc-cnrc.gc.ca
PR
Committed now, thanks.
-Sri.
On Fri, Feb 24, 2012 at 11:18 PM, Xinliang David Li davi...@google.com wrote:
ok.
David
On Fri, Feb 24, 2012 at 4:19 PM, Sriraman Tallam tmsri...@google.com wrote:
function_reordering_plugin.c includes elf.h which is not available
on non-ELF platforms building
commit d00e10980dde6c19ec3d8035a80769d54288
Author: Ollie Wild a...@google.com
Date: Sun Feb 26 00:30:42 2012 -0600
Update BASE-VER to 4.7.x (for consistency across minor releases). This is
what we do with the existing google/gcc-4_6 branch.
gcc/ChangeLog.google-4_7
This patch fixes a bug in tilegx_fixup_pcrel_references, to properly
match and fixup the second instruction of the instruction sequence to
generate a pc relative address.
Walter
* config/tilegx/tilegx.c (match_pcrel_step2): Fix instruction
pattern.
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