[PATCH] FPU IEEE 754 for MIPS r5900

Hello Richard, I used the SPU code in GCC as example for creating an r5900_single_format structure. The patch is attached to the e-mail. I want to submit this patch. > >> * removing the ISA_HAS_LDC1_SDC1 setting. I realise what you did > >> describes the reality of the processor, but the prob

folding (vec_)cond_expr in a binary operation

Hello, the first attached patch does not bootstrap and has at least 2 main issues. The second patch does pass bootstrap+testsuite, but I liked the first more... First, the fold-const bit causes an assertion failure (building libjava) in combine_cond_expr_cond, which calls: t = fold_binar

fixincludes 2013-05-23 Alexander Ivchenko

Alexander Ivchenko Mon, 29 Apr 2013 23:24:55 -0700 2013/4/29 Mike Stump : On Jan 9, 2013, at 7:14 AM, Alexander Ivchenko wrote: We have test fail for gcc.dg/cpp/trad/include.c on Android. The reason for that is that -ftraditional-cpp is not expected to work on Android due to variadic macro (l

Fix Bug 51776 (finally...)

Index: ChangeLog === --- ChangeLog (revision 200737) +++ ChangeLog (working copy) @@ -1,3 +1,7 @@ +2013-07-06 Bruce Korb + + * inclhack.def (cdef_cplusplus): removed, per Bug 51776 + 2013-05-23 Alexander Ivchenko * inclhack.

[PATCH, i386]: Fix PR57807, -masm=intel pointer size fixes

Hello! While ATT dialect doesn't care about pointer sizes, Intel dialect requires correct pointer size decorations. Attached patch introduces correct pointer size overrides, and fixes all instructions, so gcc.target/i386/sse-13.c mega-testcase compiles without problems with -masm=intel. Unfortuna

Re: [PATCH] Teach VRP about __builtin_{ffs,parity,popcount,clz,ctz,clrsb}{,l,ll,imax} (PR target/29776)

Jakub Jelinek wrote: >Hi! > >Attached are two versions of a patch to teach VRP about the int bitop >builtins. Both patches are identical for all builtins but >__builtin_c[lt]z*, which are the only two from these that are >documented >to have undefined behavior on some argument (0). > >The first