Re: [2/9] Add a REG_NREGS macro

Jeff Law writes: > On 05/18/2015 12:13 PM, Richard Sandiford wrote: >> This patch adds a REG_NREGS macro that by the end of the series >> will simply be an rtx field access. The definition in this patch >> is just a placeholder (and so I haven't tried to avoid the double >> evaluation of the para

Re: Improve error message for vector conversion

On 05/15/2015 03:59 AM, Marc Glisse wrote: Hello, this patch was regtested on ppc64le-redhat-linux. 2015-05-15 Marc Glisse gcc/ * convert.c (convert_to_integer, convert_to_vector): Include the types in the error message. gcc/testsuite/ * gcc.dg/simd-1.c: Update to the new mes

Re: [PATCH] Fix memory orders description in atomic ops built-ins docs.

On 05/15/2015 10:22 AM, Torvald Riegel wrote: This patch improves the documentation of the built-ins for atomic operations. First, to be consistent with the C++11 standard and make it easier for users to relate the built-ins to the C++11 specification, the patch changes 'memory model' to 'memory

Re: [PATCH] move check-gcc parallelize value into C front end

On 05/17/2015 09:42 PM, Jim Wilson wrote: Every check_$lang_parallelize setting is in the language specific Make-lang.in file except for the C front-end check_gcc_parallelize setting which is in the toplevel Makefile.in file. This seems to be an oversight, as it was only 3 years ago that the c/

Re: [PATCH] fortran/66057 -- detect malformed GENERIC statement

> Yes, the patch appears to catch those as well. Then: OK to commit. Thanks! FX

[RFC] COMDAT Safe Module Level Multi versioning

We have the following problem with selectively compiling modules with -m options and I have provided a solution to solve this. I would like to hear what you think. Multi versioning at module granularity is done by compiling a subset of modules with advanced ISA instructions, supported on later ge

[PATCH] S390: SUpport -mtune=native and -march=native.

The attached patch activates the -mtune=native and -march=native command line options on S390 and System z. Most of the code is a modified copy of gcc/config/mips/driver-native.c. ChangeLog attached. Ciao Dominik ^_^ ^_^ -- Dominik Vogt IBM Germany gcc/ChangeLog: 2015-05-05 Dominik Vogt

Ref: Package with Reg #: BK272062313GDM..

Good Day, Your package arrived successfully. Awaiting your reply for onward delivery. Sincerely, Mr. Rowland Dewey (Cargo Unit Director)

Fwd: Re: [PATCH, RFC]: Next stage1, refactoring: propagating rtx subclasses

It seems rather weird to me: I have definitely sent this message, but now I realized that it did not get to the mailing list archive (and it was not bounced either). Thus, resending. On 12.05.2015 23:10, Jeff Law wrote: > There's a makefile fragment in contrib which will build a large number > of

Re: [PATCH] Refactoring: use std::swap instead of manual swaps

On 19.05.2015 0:39, Jeff Law wrote: > Did you mean to lose the assignment to heapa->m_nodes in fibonacci_heap.h? > > I just spot-checked and it looks fine to me, except for perhaps losing > the assignment noted above. > > jeff Oops. Fixed that and committed to trunk (just in case, I re-ran tests

Re: [PATCH] add self-tuning to x86 hardware fast path in libitm

On Mon, May 18, 2015 at 5:29 PM, Torvald Riegel wrote: > > First of all, sorry for taking so long to review this. Thank you for > the contribution. Hello Torvald, thanks for taking the time to look into this! > My major concern is about rdtsc being used. The relation to frequency > adaption

Re: [PATCH, RS6000] gpc_reg_operand

On Mon, May 18, 2015 at 9:09 PM, Alan Modra wrote: > gpc_reg_operand contains a test that dates back to the early 1990s, > when FIRST_PSEUDO_REGISTER was 76. At that point, testing > REGNO (op) >= ARG_POINTER_REGNUM allowed ap, xer/ca, cr0..cr7 and > pseudos. A later patch corrected this to remo

Re: PING^3: [PATCH]: New configure options that make the compiler use -fPIE and -pie as default option

On Mon, May 18, 2015 at 6:11 PM, Joseph Myers wrote: > On Tue, 19 May 2015, Magnus Granberg wrote: > >> > > noted a >> > > possible issue with MIPS. Actually, rather more config/*.h and >> > > config/*/*.h headers contain specs testing fo

Re: PING^3: [PATCH]: New configure options that make the compiler use -fPIE and -pie as default option

On Tue, 19 May 2015, Magnus Granberg wrote: > > > noted a > > > possible issue with MIPS. Actually, rather more config/*.h and > > > config/*/*.h headers contain specs testing for (-fpie, -fPIE, -fno-pie, > > > -fno-PIE, -pie) options, wh

[PATCH, RS6000] gpc_reg_operand

gpc_reg_operand contains a test that dates back to the early 1990s, when FIRST_PSEUDO_REGISTER was 76. At that point, testing REGNO (op) >= ARG_POINTER_REGNUM allowed ap, xer/ca, cr0..cr7 and pseudos. A later patch corrected this to remove xer. Nowadays we have a lot more hard registers, altivec

Re: [match-and-simplify] fix incorrect code-gen in 'for' pattern

On 18 May 2015 at 20:17, Prathamesh Kulkarni wrote: > On 18 May 2015 at 14:12, Richard Biener wrote: >> On Sat, 16 May 2015, Prathamesh Kulkarni wrote: >> >>> Hi, >>> genmatch generates incorrect code for following (artificial) pattern: >>> >>> (for op (plus) >>> op2 (op) >>> (simplify >>

Re: [PATCH/libiberty] fix build of gdb/binutils with clang.

On Mon, May 18, 2015 at 4:26 PM, Yunlian Jiang wrote: > > Yes, the problem is libiberty is compiling some files > with _GNU_SOURCE defined and some not. So the configure > file does not include "#define _GNU_SOURCE". As far as I can see it should be fine to define _GNU_SOURCE when compiling all

Re: [PATCH/libiberty] fix build of gdb/binutils with clang.

Yes, the problem is libiberty is compiling some files with _GNU_SOURCE defined and some not. So the configure file does not include "#define _GNU_SOURCE". I have reduced the failing compiling as below. #define _GNU_SOURCE (1) #define ATTRIBUTE_NONNULL(m) __at

[match-and-simplify] report error for invalid operator-lists

Hi, genmatch segfaults on: (define_operator_list op (plus)) The above syntax is invalid, and it segfaults on: fatal_error (token, "operator list is empty"); because token is NULL. The patch puts a check for CPP_CLOSE_PAREN after parsing id-list. OK for trunk after bootstrap+testing completes ? T

Re: [PATCH] fortran/66057 -- detect malformed GENERIC statement

On Fri, May 15, 2015 at 10:37:24PM +0200, FX wrote: > Does it also catch the other cases shown in the PR? Things like: > > generic :: 2 > generic :: 2 = > generic :: 1 => x > generic :: ? > Yes, the patch appears to catch those as well. -- Steve

Re: [PATCH] fortran/66052 -- Prevent dereference of NULL pointer

On Sat, May 16, 2015 at 01:58:30PM +0200, Mikael Morin wrote: > > Index: gcc/fortran/decl.c > > === > > --- gcc/fortran/decl.c (revision 223094) > > +++ gcc/fortran/decl.c (working copy) > > @@ -6968,7 +6968,8 @@ gfc_match_pr

Re: PING^3: [PATCH]: New configure options that make the compiler use -fPIE and -pie as default option

fredag 08 maj 2015 10.35.44 skrev H.J. Lu: > On Thu, May 7, 2015 at 2:17 PM, Joseph Myers wrote: > > On Fri, 6 Mar 2015, H.J. Lu wrote: > >> +# We don't want to compile the compiler with -fPIE, it make PCH fail. > >> +COMPILER += @NO_PIE_CFLAGS@ > >> + > >> +# Link with -no-pie since we compile

RE: Refactor gimple_expr_type

> Date: Mon, 18 May 2015 12:08:58 +0200 > Subject: Re: Refactor gimple_expr_type > From: richard.guent...@gmail.com > To: hiradi...@msn.com > CC: tbsau...@tbsaunde.org; gcc-patches@gcc.gnu.org > > On Sun, May 17, 2015 at 5:31 PM, Aditya K wrote: >> >> >>

Re: [PATCH] add self-tuning to x86 hardware fast path in libitm

On Mon, 2015-05-18 at 23:39 +0200, Andi Kleen wrote: > > Are there better options for the utility function, or can we tune it to > > There is nothing better that isn't a lot slower. Do you care to elaborate why? As-is, I find this statement to not be convincing; at the very least we need to docu

Re: [PATCH] add self-tuning to x86 hardware fast path in libitm

> Are there better options for the utility function, or can we tune it to There is nothing better that isn't a lot slower. -Andi

Re: [PATCH] Refactoring: use std::swap instead of manual swaps

On 05/18/2015 12:07 PM, Mikhail Maltsev wrote: Hi all. The attached patch replaces the following typical sequence of assignments, matching the pattern: [type] = ; = ; = ; with std::swap (, ); The goal is to improve code readability (at least a little). Pattern was searched in GCC tree usi

Re: [9/9] Simplify register bitmap operations

On 05/18/2015 12:27 PM, Richard Sandiford wrote: After the previous changes, several callers are left with code like: if (HARD_REGISTER_P (x)) bitmap_foo_range (x, REGNO (x), REG_NREGS (x)); else bitmap_foo (x, REGNO (x)); These might as well now be: if (REG_NREGS (x) > 1)

Re: [8/9] Remove END_HARD_REGNO

On 05/18/2015 12:25 PM, Richard Sandiford wrote: This patch replaces calls to END_HARD_REGNO with calls to END_REGNO and moves END_REGNO to rtl.h (since it's now just a REG access). gcc/ * regs.h (END_HARD_REGNO): Delete. (END_REGNO): Move to... * rtl.h: ...here.

Re: [7/9] Record the number of registers in a REG

On 05/18/2015 12:24 PM, Richard Sandiford wrote: This is the main patch, to record REG_NREGS in the REG itself. The END_REGNO/END_HARD_REGNO distinction goes away in the next patch. gcc/ * rtl.h (reg_info): Add an nregs field. (REG_NREGS): Use it. (SET_REGNO_RAW): Delete

Re: [6/9] Pass REG changes through a new function

On 05/18/2015 12:23 PM, Richard Sandiford wrote: This patch adds a new function to set both the mode and regno of a REG. It makes sure that all REG PUT_MODE and SET_REGNO changes go through this function. There's a new PUT_MODE_RAW (analogous to SET_REGNO_RAW) for the cases where the caller doe

Re: [PATCH] add self-tuning to x86 hardware fast path in libitm

On Wed, 2015-04-29 at 23:23 -0400, Nuno Diegues wrote: > Hello, > > I have taken the chance to improve the patch by addressing the > comments above in this thread. > Namely: > - to use a simple random generator managed inside the library only > - removed floating point usage and replaced by fix

Re: [5/9] Create sensible dummy registers

On 05/18/2015 12:21 PM, Richard Sandiford wrote: Some pieces of code create a temporary REG or MEM and only fill it in later when they're testing the cost of a particular rtx. This patch makes sure that even the dummy REG or MEM is valid, rather than force the gen_* code to handle garbage values

Re: [4/9] Add a dedicated rtx union member for REGs

On 05/18/2015 12:19 PM, Richard Sandiford wrote: This patch replaces the current REG "i0" format with a dedicated structure, so that we can make use of the extra 32 bits in the "i" field. Of the places that iterate on formats and do something for 'i's, most already handled REGs specially before

Re: [PATCH] FreeBSD add functionality to build PIE executables.

On 18.05.15 19:36, Jeff Law wrote: On 05/17/2015 02:42 PM, Andreas Tobler wrote: Ping?! Thanks, Andreas On 11.05.15 22:34, Andreas Tobler wrote: All, this patch adds the ability to build PIE executables for FreeBSD. The core is since a longer time in the code base of FreeBSD itself and is wo

Re: [3/9] Clean up df_ref_change_reg_with_loc

On 05/18/2015 12:15 PM, Richard Sandiford wrote: This patch cleans up the interface to df_ref_change_reg_with_loc. The function is used only by SET_REGNO_RAW, so the old regno is always REGNO (x) and the caller always goes on to set REGNO. (And the fuction doesn't make much sense otherwise.) The

Re: [2/9] Add a REG_NREGS macro

On 05/18/2015 12:13 PM, Richard Sandiford wrote: This patch adds a REG_NREGS macro that by the end of the series will simply be an rtx field access. The definition in this patch is just a placeholder (and so I haven't tried to avoid the double evaluation of the parameter). The diff has extra co

Re: [PATCH] Refactoring: use std::swap instead of manual swaps

On Mon, May 18, 2015 at 09:07:43PM +0300, Mikhail Maltsev wrote: > Hi all. > The attached patch replaces the following typical sequence of > assignments, matching the pattern: > > [type] = ; > = ; > = ; > > with > > std::swap (, ); I believe that transformation is considered obvious, so you

[PATCH] plugin event for C/C++ function definitions

Hi, this patch adds two new plugin events PLUGIN_START_PARSE_FUNCTION and PLUGIN_FINISH_PARSE_FUNCTION. These events are invoked at start_function and finish_function in gcc/c/c-decl.c and gcc/cp/decl.c respectively in the C and C++ frontends. PLUGIN_START_PARSE_FUNCTION is called before parsin

[PATCH] Fix match.pd narrowing opt (PR tree-optimization/66187)

Hi! As the testcases show, for signed types we really should use SIGNED rather than UNSIGNED as tree_int_cst_min_precision argument, that function doesn't really do the desired thing with UNSIGNED for negative values and with -fwrapv we just want the narrowing cast to not lose anything from the nu

Re: [PATCH][ARM] PR/65711: Don't pass '-dynamic-linker' when '-shared' is used

Ramana Radhakrishnan skribis: > On Thu, Apr 23, 2015 at 9:29 AM, Ludovic Courtès wrote: >> As discussed at . >> >> Patch is for both 4.8 and 4.9 (possibly 5.1 too, I haven’t checked.) >> > > OK for trunk. This is also ok for all release branche

Fix r223258 fallout in gfortran.dg

I've committed the attached patch to fix testsuite regressions casued by r223258. The interface statements needed to be within the porgram unit. -- Steve Index: ChangeLog === --- ChangeLog (revision 223308) +++ ChangeLog (working

Re: [1/9] Make more use of END_REGNO

On 05/18/2015 12:11 PM, Richard Sandiford wrote: This patch just handles some obvious cases where END_REGNO could be used. gcc/ * cfgcleanup.c (mentions_nonequal_regs): Use END_REGNO. * dse.c (note_add_store): Likewise. * ira-lives.c (mark_hard_reg_dead): Likewise.

Re: [PATCH i386] Allow sibcalls in no-PLT PIC

> > After this message the discussion diverged in the direction of H.J.Lu's > proposed relaxation scheme involving new type of relocations. > > I'm not clear if my patch is actually approved. I'd like to point out that it > doesn't clash with H.J.Lu's work. It improves codegen by allowing sibca

[9/9] Simplify register bitmap operations

After the previous changes, several callers are left with code like: if (HARD_REGISTER_P (x)) bitmap_foo_range (x, REGNO (x), REG_NREGS (x)); else bitmap_foo (x, REGNO (x)); These might as well now be: if (REG_NREGS (x) > 1) bitmap_foo_range (x, REGNO (x), REG_NREGS (x)); els

[8/9] Remove END_HARD_REGNO

This patch replaces calls to END_HARD_REGNO with calls to END_REGNO and moves END_REGNO to rtl.h (since it's now just a REG access). gcc/ * regs.h (END_HARD_REGNO): Delete. (END_REGNO): Move to... * rtl.h: ...here. * bt-load.c (note_btr_set): Use END_REGNO instead

Re: [PATCH][Testsuite] Disable tests with dg-require-fork for simulated targets

On May 18, 2015, at 8:01 AM, Alan Lawrence wrote: > Simulators such as qemu report the presence of fork (it's in glibc) but > generally do not support synchronization primitives between threads, so any > tests using fork are unreliable. Hum, I have a simulator (binutils/sim) that has fork. All

Re: [PATCH i386] Allow sibcalls in no-PLT PIC

On Fri, 15 May 2015, Jan Hubicka wrote: > > >> With -fno-plt, we don't have to reject even direct calls as sibcall > > >> candidates. > > >> > > >> This patch depends on '-fplt' flag that is introduced in another patch. > > >> > > >> This patch requires that with -fno-plt all sibcall candidates go

[7/9] Record the number of registers in a REG

This is the main patch, to record REG_NREGS in the REG itself. The END_REGNO/END_HARD_REGNO distinction goes away in the next patch. gcc/ * rtl.h (reg_info): Add an nregs field. (REG_NREGS): Use it. (SET_REGNO_RAW): Delete. (set_regno_raw): New function. *

[6/9] Pass REG changes through a new function

This patch adds a new function to set both the mode and regno of a REG. It makes sure that all REG PUT_MODE and SET_REGNO changes go through this function. There's a new PUT_MODE_RAW (analogous to SET_REGNO_RAW) for the cases where the caller doesn't want that. There's a small consistency fix: g

[5/9] Create sensible dummy registers

Some pieces of code create a temporary REG or MEM and only fill it in later when they're testing the cost of a particular rtx. This patch makes sure that even the dummy REG or MEM is valid, rather than force the gen_* code to handle garbage values. gcc/ * caller-save.c (init_caller_save)

[4/9] Add a dedicated rtx union member for REGs

This patch replaces the current REG "i0" format with a dedicated structure, so that we can make use of the extra 32 bits in the "i" field. Of the places that iterate on formats and do something for 'i's, most already handled REGs specially before the format walk and so don't need to check for 'r'.

[3/9] Clean up df_ref_change_reg_with_loc

This patch cleans up the interface to df_ref_change_reg_with_loc. The function is used only by SET_REGNO_RAW, so the old regno is always REGNO (x) and the caller always goes on to set REGNO. (And the fuction doesn't make much sense otherwise.) The patch therefore gets df_ref_change_reg_with_loc to

[2/9] Add a REG_NREGS macro

This patch adds a REG_NREGS macro that by the end of the series will simply be an rtx field access. The definition in this patch is just a placeholder (and so I haven't tried to avoid the double evaluation of the parameter). The diff has extra context because in most cases it makes it obvious tha

[1/9] Make more use of END_REGNO

This patch just handles some obvious cases where END_REGNO could be used. gcc/ * cfgcleanup.c (mentions_nonequal_regs): Use END_REGNO. * dse.c (note_add_store): Likewise. * ira-lives.c (mark_hard_reg_dead): Likewise. * loop-invariant.c (mark_reg_store): Likewise.

[0/9] Record number of hard registers in a REG

While looking at a profile of gcc, I noticed one thing fairly high up the list was a loop iterating over all the registers in a REG, apparently due to the delay in computing the index for hard_regno_nregs and then loading the value (which would often be an L1 cache miss). When we were adding CONST

C++ PATCH for typedef stripping with variable templates

At the Lenexa C++ meeting Walter pointed me at a variable template testcase that was breaking, which turned out to be because we were failing to strip aliases consistently in variable template arguments, leading to mismatches between, in the first testcase, V and V. Tested x86_64-pc-linux-gnu,

Re: [PATCH 1/4] rs6000_stack_info changes for -fsplit-stack

On Sun, May 17, 2015 at 10:54 PM, Alan Modra wrote: > This patch changes rs6000_stack_info to keep save areas offsets even > when not used. I need lr_save_offset valid for split-stack, and it > seemed reasonable to treat the other offsets the same. Not zeroing > the offsets requires just one cha

[PATCH] Refactoring: use std::swap instead of manual swaps

Hi all. The attached patch replaces the following typical sequence of assignments, matching the pattern: [type] = ; = ; = ; with std::swap (, ); The goal is to improve code readability (at least a little). Pattern was searched in GCC tree using a script, but all modifications have been done

Re: [PATCH] FreeBSD add functionality to build PIE executables.

On 05/17/2015 02:42 PM, Andreas Tobler wrote: Ping?! Thanks, Andreas On 11.05.15 22:34, Andreas Tobler wrote: All, this patch adds the ability to build PIE executables for FreeBSD. The core is since a longer time in the code base of FreeBSD itself and is working fine. This patch makes it ava

C++ PATCH for core DR 1391

The proposed resolution of core issue 1391 is problematic, as I discovered when trying to implement it, but this variant seems like a strict improvement: rather than consider non-dependent conversions during deduction, wait until we've tried to deduce all arguments first. Tested x86_64-pc-linu

Re: [PATCH 02/13] optabs: Fix vec_perm -> V16QI middle end lowering.

On 05/11/2015 06:23 AM, Andreas Krebbel wrote: > @@ -6784,14 +6784,18 @@ expand_vec_perm (machine_mode mode, rtx v0, rtx v1, > rtx sel, rtx target) > { >/* Multiply each element by its byte size. */ >machine_mode selmode = GET_MODE (sel); > + /* We cannot re-use SEL as a

C++ PATCH for bugs in strip_typedefs*

While looking at a bug report caused by failure to strip all typedefs, I came across a few latent bugs in the strip_typedefs functions. First, if we're going to return a TREE_LIST unchanged we need to copy the pointer before we change the input variable. Second, if we have a decltype with no

C++ PATCH to print_tree TRAIT_EXPR

I noticed that debug_tree wasn't printing the types or code of a TRAIT_EXPR, so this fixes that. I'm not bothering to turn the kind into an enum name at the moment. Tested x86_64-pc-linux-gnu, applying to trunk. commit 6baa86e88580ee3e4f5a322fc530427169da2227 Author: Jason Merrill Date: Fri

Re: [PATCH] Fix memory orders description in atomic ops built-ins docs.

Hello, On 15/05/15 17:22, Torvald Riegel wrote: This patch improves the documentation of the built-ins for atomic operations. The "memory model" to "memory order" change does improve things but I think that the patch has some problems. As it is now, it makes some of the descriptions quite diff

[PATCH, alpha]: Fix PR57032, ICE with TARGET_LRA_P

Hello! Attached patch is the first small step towards LRA enablement on alpha. As suggester by Richard, the patch rewrites Q constraint as define_memory_constraint, so reload can push AND address to a register. I will close the referred PR, as it is not a regression and open a new one to track LR

[C++ Patch[ PR 66130

Hi, Manuel did most of the work for this rather simple issue filed by Tom: essentially, invalid_nonstatic_memfn_p gets a location_t parameter which is used to pass the location of the place where the use of the nonstatic member function is indeed invalid. Besides that, while working on the bu

[patch, gcc 5 regression] re-enable biarch for powerpc-linux-gnu

We've found that configuring a powerpc-linux-gnu cross toolchain with --enable-targets=all no longer enables -m64 support in GCC 5, due to the patch for PR target/65286. (We want to build with a -m64 multilib, in particular.) The attached patch seems to fix the breakage, but I'm not sure that

Re: RFC: Add a new relocation to x86-64/i386 psABIs

On Mon, May 18, 2015 at 8:52 AM, Michael Matz wrote: > Hi, > > On Mon, 18 May 2015, H.J. Lu wrote: > >> Yes, we should convert it to >> >> nop call foo/jmp foo nop >> >> I implemented it on users/hjl/relax branch in binutils git repo. >> >> > the insn decoder. For calls as well of course, but the

Re: RFC: Add a new relocation to x86-64/i386 psABIs

Hi, On Mon, 18 May 2015, H.J. Lu wrote: > Yes, we should convert it to > > nop call foo/jmp foo nop > > I implemented it on users/hjl/relax branch in binutils git repo. > > > the insn decoder. For calls as well of course, but there it might be > > better to have it before the call. > > > > I

Re: [PATCH, 5/5] check_GNU_style.sh: Fix tab size in 80 characters check

On 05/18/2015 02:07 AM, Tom de Vries wrote: On 12-05-15 17:16, Jeff Law wrote: [PATCH 5/5] check_GNU_style.sh: Fix tab size in 80 characters check 2015-05-11 Tom de Vries * check_GNU_style.sh (col): Fix tab size. OK. Hi Jeff, I. I noticed a performance degradation due to this patch:

Re: [patch,gomp4] remove gwv test case

On Mon, May 18, 2015 at 07:57:22AM -0700, Cesar Philippidis wrote: > This patch removes the libgomp.oacc-c/gwv.c. test case. The original > idea behind this test was to allow us to create our own parallel loops > using by using the gang, worker and vector threads directly by using the > built-in GO

Re: RFC: Add a new relocation to x86-64/i386 psABIs

On Mon, May 18, 2015 at 6:13 AM, Michael Matz wrote: > Hi, > > On Mon, 18 May 2015, H.J. Lu wrote: > >> To avoid indirect branch to internal functions, I am proposing to add a >> new relocation, R_X86_64_RELAX_GOTPCREL, to x86-64 psABI: >> >> 1. When branching to an external function, foo, compile

Re: Check canonical types in verify_type

> > + if (!comp_type_attributes (t1, t2)) > > + return false; > > > > Because I think the TBAA does not care about attribute lists. I suppose > > this > > is kind-of harmless because of: > > I think that was about attributes like 'packed', but those should have > their effects applied at

[PATCH][Testsuite] Disable tests with dg-require-fork for simulated targets

Simulators such as qemu report the presence of fork (it's in glibc) but generally do not support synchronization primitives between threads, so any tests using fork are unreliable. This patch disables the subset of such tests that identify themselves using dg-require-fork. At present, such tes

[patch,gomp4] remove gwv test case

This patch removes the libgomp.oacc-c/gwv.c. test case. The original idea behind this test was to allow us to create our own parallel loops using by using the gang, worker and vector threads directly by using the built-in GOACC_ thread functions. This test was supposed to ensure that those function

[PATCH][AArch64][PR 66136] rewrite geniterators.sh in awk

Rewrote the generator script in awk, to avoid dealing with sed portability issues. gcc/Changelog: 2015-05-18 Szabolcs Nagy PR target/66136 * config/aarch64/geniterators.sh: Rewrite in awk. diff --git a/gcc/config/aarch64/geniterators.sh b/gcc/config/aarch64/geniterators.sh ind

RE: [PATCH, MIPS]: Fix internal compiler error: in check_bool_attrs, at recog.c:2218 for micromips attribute

On Mon, 18 May 2015, Robert Suchanek wrote: > > Just to check, the reason we don't see this in the current testsuite is that > > there is no test with both MIPS and microMIPS functions? > > Correct. The testsuite either tests microMIPS or MIPS but not both in > the same TU. We could add -mfli

Re: [PATCH][calls.c] Remove #ifdef checks on STACK_GROWS_DOWNWARD

On 05/18/2015 03:22 AM, Kyrill Tkachov wrote: Hi all, As per https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01166.html I saw that STACK_GROWS_DOWNWARD is being checked for ifdef in a number of places unrelated to the patch in the PR, so decided to remove the ifdef checks for STACK_GROWS_DOWNWARD

Re: [match-and-simplify] fix incorrect code-gen in 'for' pattern

On 18 May 2015 at 14:12, Richard Biener wrote: > On Sat, 16 May 2015, Prathamesh Kulkarni wrote: > >> Hi, >> genmatch generates incorrect code for following (artificial) pattern: >> >> (for op (plus) >> op2 (op) >> (simplify >> (op @x @y) >> (op2 @x @y) >> >> generated gimple code:

Re: [patch 10/10] debug-early merge: compiler proper

> On Fri, May 8, 2015 at 2:40 AM, Aldy Hernandez wrote: > > As seen on TV. > > +/* FIRST_TIME is set to TRUE for the first time we are called for a > + translation unit from finalize_compilation_unit() or false > + otherwise. */ > + > static void > -analyze_functions (void) > +analyze_funct

Re: [PATCH] [AArch32] Additional bics patterns.

Committed r223295. Alex.

RE: [PATCH, MIPS]: Fix internal compiler error: in check_bool_attrs, at recog.c:2218 for micromips attribute

Hi Matthew, > > This patch fixes an internal compiler error when micromips/nomicromips > > attributes are used. > > > > The problem here was that the cached boolean attributes for the current > > target did not agree with the uncached attributes throwing an assertion > > error. > > > > It appears

Re: [PATCH 01/13] recog: Increased max number of alternatives - v2

On Mon, May 18, 2015 at 3:41 PM, Andreas Krebbel wrote: > The new version also changes the type for the alternative_mask to unsigned > HOST_WIDE_INT. > > Bootstrapped without regressions on x86-64. > > Ok to apply? Please use uint64_t instead. Richard. > Bye, > > -Andreas- > > gcc/ > *

Re: [PING][PR65637] Fix ssa-handling code in expand_omp_for_static_chunk

On 18-05-15 14:53, Tom de Vries wrote: On 15-04-15 15:10, Tom de Vries wrote: Hi, This patch series fixes PR65637. Currently, ssa-handling code in expand_omp_for_static_chunk is dead and not exercised by testing. Ssa-handling code in omp-low.c is only triggered by pass_parallelize_loops, and

[PATCH 01/13] recog: Increased max number of alternatives - v2

The new version also changes the type for the alternative_mask to unsigned HOST_WIDE_INT. Bootstrapped without regressions on x86-64. Ok to apply? Bye, -Andreas- gcc/ * recog.h: Increase MAX_RECOG_ALTERNATIVES. --- gcc/recog.h |4 ++-- 1 file changed, 2 insertions(+), 2 deletions

Re: [PATCH][ARM] PR/65711: Don't pass '-dynamic-linker' when '-shared' is used

On Thu, Apr 23, 2015 at 9:29 AM, Ludovic Courtès wrote: > As discussed at . > > Patch is for both 4.8 and 4.9 (possibly 5.1 too, I haven’t checked.) > OK for trunk. This is also ok for all release branches if no objections in 24 hours. Sorry ab

Re: RFC: Add a new relocation to x86-64/i386 psABIs

Hi, On Mon, 18 May 2015, H.J. Lu wrote: > To avoid indirect branch to internal functions, I am proposing to add a > new relocation, R_X86_64_RELAX_GOTPCREL, to x86-64 psABI: > > 1. When branching to an external function, foo, compiler may generate > call/jmp *foo@GOTRELAX(%rip) >which

[PING][PR65637] Fix ssa-handling code in expand_omp_for_static_chunk

On 15-04-15 15:10, Tom de Vries wrote: Hi, This patch series fixes PR65637. Currently, ssa-handling code in expand_omp_for_static_chunk is dead and not exercised by testing. Ssa-handling code in omp-low.c is only triggered by pass_parallelize_loops, and that pass doesn't specify a chunk size o

Re: [RFA] More type narrowing in match.pd V2

On Mon, May 18, 2015 at 2:34 PM, Marc Glisse wrote: > On Mon, 18 May 2015, Richard Biener wrote: > >> On Thu, May 14, 2015 at 4:28 PM, Jeff Law wrote: >>> >>> On 05/14/2015 08:04 AM, Marc Glisse wrote: On Fri, 1 May 2015, Jeff Law wrote: > Slight refactoring of the conditi

RFC: Add a new relocation to x86-64/i386 psABIs

To avoid indirect branch to internal functions, I am proposing to add a new relocation, R_X86_64_RELAX_GOTPCREL, to x86-64 psABI: 1. When branching to an external function, foo, compiler may generate call/jmp *foo@GOTRELAX(%rip) which generates R_X86_64_RELAX_GOTPCREL relocation, instea

Re: [RFA] More type narrowing in match.pd V2

On Mon, 18 May 2015, Richard Biener wrote: On Thu, May 14, 2015 at 4:28 PM, Jeff Law wrote: On 05/14/2015 08:04 AM, Marc Glisse wrote: On Fri, 1 May 2015, Jeff Law wrote: Slight refactoring of the condition by using types_match as suggested by Richi. I also applied the new types_match to

Re: [PATCH, PR middle-end/66134] Fix coalescing for bounds used in abnormal phi

2015-05-18 12:48 GMT+03:00 Richard Biener : > On Fri, May 15, 2015 at 11:43 AM, Ilya Enkovich > wrote: >> Hi, >> >> This patch fixes misuse of abnormal bounds copy to avoid coalescing issue. >> Bootstrapped and regtested for x86_64-unknown-linux-gnu. Applied to trunk. >> Is it OK for gcc-5?

RE: [PATCH, MIPS]: Fix internal compiler error: in check_bool_attrs, at recog.c:2218 for micromips attribute

> This patch fixes an internal compiler error when micromips/nomicromips > attributes are used. > > The problem here was that the cached boolean attributes for the current > target did not agree with the uncached attributes throwing an assertion > error. > > It appears that saving and restoring t

Re: [patch 10/10] debug-early merge: compiler proper

On Fri, May 8, 2015 at 2:40 AM, Aldy Hernandez wrote: > As seen on TV. +/* FIRST_TIME is set to TRUE for the first time we are called for a + translation unit from finalize_compilation_unit() or false + otherwise. */ + static void -analyze_functions (void) +analyze_functions (bool first_tim

Re: [PATCH][tree-ssa-math-opts] Expand pow (x, CONST) using square roots when possible

On Wed, May 13, 2015 at 5:33 PM, Kyrill Tkachov wrote: > Hi Richard, > > On 13/05/15 12:27, Richard Biener wrote: I notice that we don't have a testuite check that the target has >>a hw sqrt instructions. Would you like me to add one? Or can I make >>the testcase aarch64-specif

Re: PRE and uninitialized variables

On Sun, May 17, 2015 at 9:11 PM, Marc Glisse wrote: > Hello, > > first, this patch is not ready (it doesn't even bootstrap), I am posting it > for comments. The idea is, when we do value numbering, while looking for the > current value of a local variable, we may hit a clobber or reach the > begin

[PATCH][ARM] Restrict MAX_CONDITIONAL_EXECUTE when -mrestrict-it is in place

Hi all, When using the short Thumb2 IT blocks we want to also restrict ifcvt so that it will not end up generating a number of back-to-back cond_execs that will later end up being back to back single-instruction IT blocks. Branching over them should be a better choice. This patch implements th

Re: Refactor gimple_expr_type

On Sun, May 17, 2015 at 5:31 PM, Aditya K wrote: > > > >> Date: Sat, 16 May 2015 11:53:57 -0400 >> From: tbsau...@tbsaunde.org >> To: hiradi...@msn.com >> CC: gcc-patches@gcc.gnu.org >> Subject: Re: Refactor gimple_expr_type >> >> On Fri, May 15, 2015 at 07

Re: [PATCH][AArch64] PR target/65491: Classify V1TF vectors as AAPCS64 short vectors rather than composite types

Ping^3. Thanks, Kyrill On 12/05/15 10:06, Kyrill Tkachov wrote: Ping^2. Thanks, Kyrill On 06/05/15 10:57, Kyrill Tkachov wrote: Ping. https://gcc.gnu.org/ml/gcc-patches/2015-04/msg01004.html Thanks, Kyrill On 20/04/15 11:16, Kyrill Tkachov wrote: Hi all, The ICE in the PR happens when we

Re: match.pd: (x | y) & ~x -> y & ~x

On Fri, May 15, 2015 at 7:22 PM, Marc Glisse wrote: > Hello, > > we already have the more complicated: x & ~(x & y) -> x & ~y (which I am > reindenting by the way) and the simpler: (~x | y) & x -> x & y, so I am > proposing this one for completeness. Regtested on ppc64le-redhat-linux. Ok (doesn't

  1   2   >