On Fri, Jul 03, 2015 at 03:09:27PM +0200, Sebastian Huber wrote:
libgomp/ChangeLog
2015-07-03 Sebastian Huber sebastian.hu...@embedded-brains.de
* libgomp.h (gomp_thread_pool): Comment last_team field.
---
libgomp/libgomp.h | 3 +++
1 file changed, 3 insertions(+)
diff --git
On 07/03/2015 03:07 PM, Richard Sandiford wrote:
Martin Jambor mjam...@suse.cz writes:
On Fri, Jul 03, 2015 at 09:55:58AM +0100, Richard Sandiford wrote:
Trevor Saunders tbsau...@tbsaunde.org writes:
On Thu, Jul 02, 2015 at 09:09:31PM +0100, Richard Sandiford wrote:
Martin Liška
OK, thanks.
Jason
On Fri, Jul 03, 2015 at 03:41:29PM +0200, Richard Biener wrote:
The fallout (at least on x86_64) is surprisingly small, i.e. none, just
gcc.dg/vect/pr59984.c test (using -fopenmp-simd) ICEs, but that is due
to a bug in the vectorizer. Jakub has a patch and knows the details.
As the test
Charles Baylis wrote:
These patches are a port of the changes do the same thing for AArch64 (see
https://gcc.gnu.org/ml/gcc-patches/2015-06/msg01984.html)
The first patch ports over some infrastructure, and the second converts the
vldN_lane and vstN_lane intrinsics. The changes required for
On Fri, 3 Jul 2015, Richard Biener wrote:
On Fri, 3 Jul 2015, Marek Polacek wrote:
This patch implements a new pass, called laddress, which deals with
lowering ADDR_EXPR assignments. Such lowering ought to help the
vectorizer, but it also could expose more CSE opportunities, maybe
On Fri, 3 Jul 2015, Marek Polacek wrote:
This patch implements a new pass, called laddress, which deals with
lowering ADDR_EXPR assignments. Such lowering ought to help the
vectorizer, but it also could expose more CSE opportunities, maybe
help reassoc, etc. It's only active when optimize
On 07/02/2015 07:41 PM, Jim Wilson wrote:
The code compiles with -std=c++98. It does not compile with -std=c++14.
So this testcase should be fixed to work with c++14.
Done.
Jason
This new test tests that all shifts of int compile to exactly one
machine instruction, not two as in the PR (which was a problem in
combine). Tested on powerpc64-linux, with the usual options
(-m32,-m32/-mpowerpc64,-m64,-m64/-mlra); okay for trunk?
Segher
2015-07-03 Segher Boessenkool
This patch series implements the changes/additions to the ARM ABI proposed at
https://gcc.gnu.org/ml/gcc/2015-07/msg00040.html .
The first patch is the ABI update. This is an ABI-breaking change for any code
using __attribute__((aligned(...))) on a public interface (a case not previously
Martin Jambor mjam...@suse.cz writes:
On Fri, Jul 03, 2015 at 09:55:58AM +0100, Richard Sandiford wrote:
Trevor Saunders tbsau...@tbsaunde.org writes:
On Thu, Jul 02, 2015 at 09:09:31PM +0100, Richard Sandiford wrote:
Martin Liška mli...@suse.cz writes:
diff --git a/gcc/asan.c
On 06/30/2015 06:23 PM, Manuel López-Ibáñez wrote:
On 30 June 2015 at 17:18, Dhole dh...@openmailbox.org wrote:
In the debian reproducible builds project we have considered several
options to address this issue. We considered redefining the __DATE__ and
__TIME__ defines by command line flags
On 03/07/15 14:40 +0300, Ville Voutilainen wrote:
Tested on Linux-PPC64. Patch gzipped to avoid polluting people's
mailboxes with a 45k patch.
Thanks very much, I made a few whitespace changes and committed it (as
attached) after testing.
I've also updated the status tables in the docs, see
On Fri, Jul 3, 2015 at 10:16 AM, Segher Boessenkool
seg...@kernel.crashing.org wrote:
This new test tests that all shifts of int compile to exactly one
machine instruction, not two as in the PR (which was a problem in
combine). Tested on powerpc64-linux, with the usual options
Hi,
-moverride is not a feature modifier, so it is currently misplaced in the
documentation.
Fix that by moving it out to the general AArch64 options section.
Checked in the HTML output that is now in a sensible place, and committed
as attached as obvious as revision 225384.
Thanks,
James
---
These include tests of structs, scalars, and vectors - only general-purpose
registers are affected by the ABI rules for alignment, but we can restrict the
vector test to use the base AAPCS.
Prior to this patch, align2.c, align3.c and align_rec1.c were failing (the
latter showing an internal
The previous patch caused a regression in gcc.c-torture/execute/20040709-1.c at
-O0 (only), and the new align_rec2.c test fails, both outputting an illegal
assembler instruction (ldrd on an odd-numbered reg) from output_move_double in
arm.c. Most routes have checks against such an illegal
Hi,
On Fri, Jul 03, 2015 at 09:55:58AM +0100, Richard Sandiford wrote:
Trevor Saunders tbsau...@tbsaunde.org writes:
On Thu, Jul 02, 2015 at 09:09:31PM +0100, Richard Sandiford wrote:
Martin Liška mli...@suse.cz writes:
diff --git a/gcc/asan.c b/gcc/asan.c
index e89817e..dabd6f1 100644
This patch implements a new pass, called laddress, which deals with
lowering ADDR_EXPR assignments. Such lowering ought to help the
vectorizer, but it also could expose more CSE opportunities, maybe
help reassoc, etc. It's only active when optimize != 0.
So e.g.
_1 = (sizetype) i_9;
_7 = _1
libgomp/ChangeLog
2015-07-03 Sebastian Huber sebastian.hu...@embedded-brains.de
* libgomp.h (gomp_thread_pool): Comment last_team field.
---
libgomp/libgomp.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/libgomp/libgomp.h b/libgomp/libgomp.h
index 5272f01..5ed0f78 100644
---
On July 3, 2015 4:06:26 PM GMT+02:00, Jakub Jelinek ja...@redhat.com wrote:
On Fri, Jul 03, 2015 at 03:41:29PM +0200, Richard Biener wrote:
The fallout (at least on x86_64) is surprisingly small, i.e. none,
just
gcc.dg/vect/pr59984.c test (using -fopenmp-simd) ICEs, but that is
due
to a bug
On July 3, 2015 5:24:24 PM GMT+02:00, Alan Lawrence alan.lawre...@arm.com
wrote:
This patch series implements the changes/additions to the ARM ABI
proposed at
https://gcc.gnu.org/ml/gcc/2015-07/msg00040.html .
The first patch is the ABI update. This is an ABI-breaking change for
any code
using
In list::sort() we use 65 list objects to use as temporary storage,
splicing and swapping elements between lists.
However the lists are default constructed, with no allocator argument,
which is wrong because the allocator type might not be default
constructible, and even more wrong because
On 03/07/15 16:27, Alan Lawrence wrote:
The previous patch caused a regression in
gcc.c-torture/execute/20040709-1.c at -O0 (only), and the new
align_rec2.c test fails, both outputting an illegal assembler
instruction (ldrd on an odd-numbered reg) from output_move_double in
arm.c. Most routes
2015-07-03 17:51 GMT+02:00 Jonathan Wakely jwak...@redhat.com:
As well as reducing the number of lists we construct when sorting this
also allows us to range-check and ensure we don't overflow the
fixed-size array (we now get an exception if that happens, although
that's probably not possible
On 03/07/15 18:56 +0200, Daniel Krügler wrote:
- Isn't it necessary to cope with possibly final allocators when
unconditionally forming the derived member class
struct _Impl : allocator_type
If the allocator was final we couldn't even instantiate std::list
because of this in _List_base:
On July 3, 2015 6:11:13 PM GMT+02:00, Richard Earnshaw
richard.earns...@foss.arm.com wrote:
On 03/07/15 16:26, Alan Lawrence wrote:
These include tests of structs, scalars, and vectors - only
general-purpose registers are affected by the ABI rules for
alignment,
but we can restrict the vector
On 03/07/15 16:26, Alan Lawrence wrote:
These include tests of structs, scalars, and vectors - only
general-purpose registers are affected by the ABI rules for alignment,
but we can restrict the vector test to use the base AAPCS.
Prior to this patch, align2.c, align3.c and align_rec1.c were
Hi,
noticed this nit in a conditional for c++11 attributes. I'm going to
commit the below as obvious.
Thanks,
Paolo.
/
2015-07-03 Paolo Carlini paolo.carl...@oracle.com
* attribs.c (decl_attributes): Guard inform with the return value
of the preceding
On Fri, Jul 03, 2015 at 04:26:02PM +0100, Alan Lawrence wrote:
These include tests of structs, scalars, and vectors - only general-purpose
registers are affected by the ABI rules for alignment, but we can restrict
the vector test to use the base AAPCS.
Prior to this patch, align2.c, align3.c
The addition of libstdc++fs broke an inexact and fragile method in the
libstdc++-v3/python makefile, so it mis-names a python script after
libstdc++fs rather than libstdc++.
With DESTDIR /usr/lib, toolexeclibdir ../lib, and the .so version of
6.0.21, this makefile used to install the python
Hi Martin,
Martin Liška mli...@suse.cz writes:
On 07/03/2015 03:07 PM, Richard Sandiford wrote:
Martin Jambor mjam...@suse.cz writes:
On Fri, Jul 03, 2015 at 09:55:58AM +0100, Richard Sandiford wrote:
Trevor Saunders tbsau...@tbsaunde.org writes:
On Thu, Jul 02, 2015 at 09:09:31PM +0100,
On Jul 3, 2015, at 4:16 AM, Carlos Sánchez de La Lama csanchez...@gmail.com
wrote:
PR52482 seems to be cause by old gas not supporting named parameters in
macros. Xcode-2.5 (last available for OSX PPC) gas version is 1.38.
Patch is against gcc-4.8.4, but affected lines have not changed in
Please find a patch that attempt to FIX PR66726 by factoring conversion
out of COND_EXPR as explained in the PR.
Bootstrapped and regression tested on x86-64-none-linux-gnu with no new
regressions. Is this OK for trunk?
Thanks,
Kugan
gcc/testsuite/ChangeLog:
2015-07-03 Kugan Vivekanandarajah
It seems that when the matching of various specifiers in
OPEN, CLOSE, and WRITE were written with much confidence
that user would not do something stupid.
The attached patch fixes multiple ICEs. Regression tested
on i386-*-freebsd. OK to commit?
PS: There are other ICEs caused be ill-formed
Hi,
The current branch range tests assume that the MIPS branch instructions
have a 16 bit branch offset which is shifted by 2. Unfortunately for microMIPS
this offset is shifted by 1 which reduces the branch range and is causing the
branch-[2,4,6,10,12].c tests to fail.
The following
This patch reorganizes the handling of vector and worker single modes and their
transitions to/from partitioned mode out of omp-low and into mach-dep-reorg.
That allows the regular middle end optimizers to behave normally -- with two
exceptions, see below.
There are no libgomp regressions,
On Fri, Jul 03, 2015 at 06:51:57PM -0400, Nathan Sidwell wrote:
IMHO this is a step towards putting target-dependent handling in the target
compiler and out of the more generic host-side compiler.
The changelog is separated into 3 parts
- a) general infrastructure
- b) additiona
- c)
On 03/07/15 19:24, Richard Biener wrote:
On July 3, 2015 6:11:13 PM GMT+02:00, Richard Earnshaw
richard.earns...@foss.arm.com wrote:
On 03/07/15 16:26, Alan Lawrence wrote:
These include tests of structs, scalars, and vectors - only
general-purpose registers are affected by the ABI rules for
Hi,
The test failed on sparc because sparc doesn't support vect_int_mult. This
patch adds the prerequisite condition thus skips test on such platforms.
An obvious change, will apply it in 24h.
Thanks,
bin
gcc/testsuite/ChangeLog
2015-07-02 Bin Cheng bin.ch...@arm.com
PR
On Fri, Jul 3, 2015 at 1:41 AM, Jim Wilson jim.wil...@linaro.org wrote:
On 07/01/2015 11:17 PM, Jim Wilson wrote:
On Wed, Jul 1, 2015 at 10:21 PM, Jason Merrill ja...@redhat.com wrote:
This document also says that A workaround until libraries get updated is to
include cstddef or stddef.h
On 2 July 2015 at 14:44, Christophe Lyon christophe.l...@linaro.org wrote:
Hi,
Here is the missing test for ARM/AArch64 AdvSIMD intrinsic: vget_lane.
Tested on arm, armeb, aarch64 and aarch64_be targets (using QEMU).
The tests all pass, expect on armeb where vgetq_lane_s64 and
On Thu, Jul 2, 2015 at 10:49 PM, Jakub Jelinek ja...@redhat.com wrote:
On Thu, Jul 02, 2015 at 04:47:13PM -0400, David Edelsohn wrote:
I can change the patch to include it after system.h, if that is
preferred. That order also works on AIX.
If including it right after system.h works, it is
On Fri, Jul 03, 2015 at 10:32:38AM +0200, Richard Biener wrote:
On Thu, Jul 2, 2015 at 10:49 PM, Jakub Jelinek ja...@redhat.com wrote:
On Thu, Jul 02, 2015 at 04:47:13PM -0400, David Edelsohn wrote:
I can change the patch to include it after system.h, if that is
preferred. That order also
Ping^4.
On Fri, Jun 26, 2015 at 10:08:51AM +0200, Marek Polacek wrote:
I'm pinging the C++ parts.
On Fri, Jun 19, 2015 at 12:44:36PM +0200, Marek Polacek wrote:
Ping.
On Fri, Jun 12, 2015 at 11:07:29AM +0200, Marek Polacek wrote:
Ping.
On Fri, Jun 05, 2015 at 10:55:08AM
On Fri, Jul 3, 2015 at 10:37 AM, Jakub Jelinek ja...@redhat.com wrote:
On Fri, Jul 03, 2015 at 10:32:38AM +0200, Richard Biener wrote:
On Thu, Jul 2, 2015 at 10:49 PM, Jakub Jelinek ja...@redhat.com wrote:
On Thu, Jul 02, 2015 at 04:47:13PM -0400, David Edelsohn wrote:
I can change the patch
Trevor Saunders tbsau...@tbsaunde.org writes:
On Thu, Jul 02, 2015 at 09:09:31PM +0100, Richard Sandiford wrote:
Martin Liška mli...@suse.cz writes:
diff --git a/gcc/asan.c b/gcc/asan.c
index e89817e..dabd6f1 100644
--- a/gcc/asan.c
+++ b/gcc/asan.c
@@ -362,20 +362,20 @@ struct
On Fri, Jul 3, 2015 at 5:53 AM, H.J. Lu hjl.to...@gmail.com wrote:
x86intrin.h has useful intrinsics for instructions for IA MCU. This
patch adds __iamcu__ check to x86intrin.h and ia32intrin.h.
OK for trunk?
H.J.
---
gcc/
PR target/66746
* config/i386/ia32intrin.h
On 07/03/2015 10:55 AM, Richard Sandiford wrote:
Trevor Saunders tbsau...@tbsaunde.org writes:
On Thu, Jul 02, 2015 at 09:09:31PM +0100, Richard Sandiford wrote:
Martin Liška mli...@suse.cz writes:
diff --git a/gcc/asan.c b/gcc/asan.c
index e89817e..dabd6f1 100644
--- a/gcc/asan.c
+++
On Tue, 30 Jun 2015, James Greenhalgh wrote:
On Fri, Jun 26, 2015 at 06:10:00PM +0100, Jakub Jelinek wrote:
On Fri, Jun 26, 2015 at 06:03:34PM +0100, James Greenhalgh wrote:
--- /dev/null
+++ b/gcc/testsuite/g++.dg/pr66119.C
I think generally testcases shouldn't be added into
Ping!
Version increment only to reflect rebasing on current trunk.
Bootstraps and regtests fine on x86_64-linux-gnu/f21.
I am tempted to follow Paul's method of setting a deadline for objections. Else
I will commit the patch next Friday (just kidding). I am more interested in
a review. The
I observed that we fail to match patterns because when valueizing
sub-expression operands we fail to canonicalize operand order
and thus try matching (1 + a) - 1 instead of the canonical
(a + 1) - 1. The following fixes this at least for commutative
tree codes. For comparisons which we also
Thank you for the patch in your other mail that changes this!
You're welcome.
We were also thinking of the instruction timing information found in the
leon_costs and leon3_costs. We took a look at the values in leon_costs
and they seem to fit well with the UT699, except for division. We got
Hi all,
PR52482 seems to be cause by old gas not supporting named parameters in
macros. Xcode-2.5 (last available for OSX PPC) gas version is 1.38.
Patch is against gcc-4.8.4, but affected lines have not changed in SVN HEAD.
BR
Carlos
diff -ur gcc-4.8.4.old/libitm/config/powerpc/sjlj.S
The following testcase was breaking because we we're trying to
access TYPE_LANG_SPECIFIC via CLASSTYPE_TEMPLATE_* macros without
first checking that we indeed have a CLASS_TYPE.
Bootstrapped/regtested on x86_64-linux, ok for trunk/5/4.9?
2015-07-03 Marek Polacek pola...@redhat.com
PR
Tested on Linux-PPC64. Patch gzipped to avoid polluting people's
mailboxes with a 45k patch.
2015-07-03 Ville Voutilainen ville.voutilai...@gmail.com
Implement std::experimental::fundamentals_v2::propagate_const.
* include/Makefile.am: Add propagate_const.
* include/Makefile.in: Add
One could add a -mtune-fpu switch. Did you look at other architectures in the
GCC tree that would have similar requirements?
Thank you for the suggestion about adding a -mtune-fpu switch. I have
not yet looked at the other architectures, but will do so before proceeding.
--
Daniel Cederman
__builtin_apply* and __builtin_return accesses the floating point registers on
SPARC even when compiling with -msoft-float.
gcc/ChangeLog:
2015-06-26 Daniel Cederman ceder...@gaisler.com
* config/sparc/sparc.c (sparc_function_value_regno_p): Floating
point registers cannot
gcc/ChangeLog:
2015-07-03 Daniel Cederman ceder...@gaisler.com
* config/sparc/sparc.c (struct processor_costs): Set div cost
for leon to match UT699 and AT697F. Set mul cost for leon3 to
match standard leon3.
---
gcc/config/sparc/sparc.c | 8
1 file changed, 4
This removes a warning about operand 0 missing mode
gcc/ChangeLog:
2015-06-26 Daniel Cederman ceder...@gaisler.com
* config/sparc/sparc.md: Window save takes a single integer
---
gcc/config/sparc/sparc.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
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