Ok.
Richard.
On 8/6/15, Thomas Schwinge wrote:
> Hi!
>
> On Wed, 5 Aug 2015 15:10:40 +0100, "David Sherwood"
> wrote:
>> In lto_input_mode_table there is the following line of code:
>>
>> machine_mode inner = (machine_mode) table[bp_unpack_value (&bp, 8)];
>>
>> Is this right? In lto_write_mode
The transformation
/* If this is (and:M1 (subreg:M1 X:M2 0) (const_int C1)) where C1
fits in both M1 and M2 and the SUBREG is either paradoxical
or represents the low part, permute the SUBREG and the AND
and try again. */
in the paradoxical case (
> Hi DJ,
>
> There is no need to assert these just to say "not supported" and gcc
> may rarely generate addresses from valid code which trigger these
> asserts. Ok?
>
> OK - please apply.
Thanks, committed.
>From Intel SDM Vol 3:
Table 35-29 lists MSRs that are common to processors based on the
Broadwell microarchitectures (including CPUID signatures 06_3DH, 06_47H,
06_4FH, and 06_56H).
OK for trunk?
H.J.
---
* config/i386/driver-i386.c (host_detect_local_cpu): Treat
model == 0x4f a
Richard Biener writes:
>>> E.g. for the attached microbenchmark I get:
>>>
>>> Time taken, normalised to VERSION==1
>>>
>>> VERSION==1: 1.000
>>> VERSION==2: 1.377
>>> VERSION==3: 3.202 (1.638 with -minline-all-stringops)
>>> VERSION==4: 4.242 (2.921 with -minline-all-stringops)
>>
"H.J. Lu" writes:
> On Thu, Aug 6, 2015 at 11:19 AM, Richard Sandiford
> wrote:
>> "H.J. Lu" writes:
>>> Since ira_implicitly_set_insn_hard_regs may be called outside of
>>> ira-lives.c, it can't use the local variable, preferred_alternatives.
>>> This patch adds an alternative_mask argument to
On August 7, 2015 3:50:33 PM GMT+02:00, Trevor Saunders
wrote:
>On Fri, Aug 07, 2015 at 10:45:57AM +0100, Richard Sandiford wrote:
>> Trevor Saunders writes:
>> > On Thu, Aug 06, 2015 at 08:36:36PM +0100, Richard Sandiford wrote:
>> >> An integrated assembler or tighter asm output would be nice,
On Thu, Aug 6, 2015 at 11:19 AM, Richard Sandiford
wrote:
> "H.J. Lu" writes:
>> Since ira_implicitly_set_insn_hard_regs may be called outside of
>> ira-lives.c, it can't use the local variable, preferred_alternatives.
>> This patch adds an alternative_mask argument to
>> ira_implicitly_set_insn_
On Fri, Aug 07, 2015 at 05:56:42PM +0200, FX wrote:
> Attached patch fixes libgfortran???s FPU initialization by only performing it
> when the user explicitly asked for it, with option -ffpe-trap.
>
> Bootstrapped and regtested on x86_64-apple-darwin14.
> OK to commit to trunk?
>
OK.
--
Steve
Attached patch fixes libgfortran’s FPU initialization by only performing it
when the user explicitly asked for it, with option -ffpe-trap.
Bootstrapped and regtested on x86_64-apple-darwin14.
OK to commit to trunk?
FX
fpu.ChangeLog
Description: Binary data
fpu.diff
Description: Binary data
> I think it's a bad idea committing an (approved) patch without the
> prerequisite, introducing testsuite failures for everyone and sending us
> all hunting what's wrong ;-(
I realize I probably should have XFAIL’ed the testcase, indeed. But I was
hoping for a quick review of the simple libquadm
FX writes:
>> FAIL: gfortran.dg/ieee/large_1.f90 -O0 (test for excess errors)
>> Excess errors:
>> large_1.f90:(.text+0x1792): undefined reference to `logbq’
>
> Fixed by the patch there:
> https://gcc.gnu.org/ml/gcc-patches/2015-08/msg00124.html
> Waiting for review.
I think it's a bad idea
> This looks fine to me. OK for trunk.
Thanks for review. Committed as revision 226723.
> I am not sure how you communicate the IEEE support to the front, since
> you need to be able to support cross-compilation. I identification of
> the hardware architecture sufficient?
Indeed, it is tricky t
On Fri, Aug 07, 2015 at 10:45:57AM +0100, Richard Sandiford wrote:
> Trevor Saunders writes:
> > On Thu, Aug 06, 2015 at 08:36:36PM +0100, Richard Sandiford wrote:
> >> An integrated assembler or tighter asm output would be nice, but when
> >> I last checked LLVM was usually faster than GCC even w
James Greenhalgh writes:
> On Thu, Aug 06, 2015 at 05:16:33PM +0100, Jiong Wang wrote:
>
> Hi Jiong,
>
> The new testcases introduced in this and the related patch are failing
> for me on aarch64-none-elf:
>
> aarch64-none-elf
>
> NA->FAIL: gcc.target/aarch64/noplt_1.c scan-assembler
>
Hi,
this patch is a fix for pr27127. It avoids splitting the DI registers
into SI ones if it is not allowed, which breaks the introduced loop.
I haven't added a testcase as the bug is already exhibited by several
regressions (like g++.dg/ext/attribute-test-2.C or g++.dg/eh/simd-1.C)
but I can add
2015-08-06 Uros Bizjak
* Makefile.in (.INTERMEDIATE): Add gpl.pod.
Bootstrapped on x86_64-linux-gnu, Fedora 22.
Committed to mainline SVN.
Uros.
Index: Makefile.in
===
--- Makefile.in (revision 226719)
+++ Makefile.in (work
Hi FX,
This looks fine to me. OK for trunk.
I am not sure how you communicate the IEEE support to the front, since
you need to be able to support cross-compilation. I identification of
the hardware architecture sufficient?
Cheers
Paul
On 6 August 2015 at 18:11, FX wrote:
> The attached patch
Hello!
Attached patch fixes:
Makefile:871: warning: overriding recipe for target 'gjdoc'
Makefile:786: warning: ignoring old recipe for target 'gjdoc'
build warning when compiling libjava.
The problem was in configure.ac: we have to depend gjdoc build on
CREATE_WRAPPERS in the same way as other
On Wed, Aug 5, 2015 at 1:58 AM, Andreas Schwab wrote:
> PASS
> kill: not enough arguments
> FAIL: net
> Makefile:4696: recipe for target 'net/check' failed
> make[4]: *** [net/check] Error 1
>
> $ cat net/check-testlog
> PASS
> kill: not enough arguments
> FAIL: net
> ../../../libgo/testsuite/gote
Hi ,
For the below code x86_64 is able to vectorize.
#define LEN 32000
__attribute__((aligned(32))) float a[LEN], b[LEN],c[LEN];
void test()
{
for (int i = 0; i < LEN; i++) {
if (b[i] > (float)0.) {
a[i] = b[i];
}
}
}
X86_64 ASM
L2:
vmovaps b(%rax), %ymm0
Trevor Saunders writes:
> On Thu, Aug 06, 2015 at 08:36:36PM +0100, Richard Sandiford wrote:
>> An integrated assembler or tighter asm output would be nice, but when
>> I last checked LLVM was usually faster than GCC even when compiling to asm,
>> even though LLVM does use indirection (in the form
Thanks, but the name of the macro was changed in more recent drafts.
Original Message
From: Ed Smith-Rowland <3dw...@verizon.net>
Sent: Fri, Aug 7, 2015 03:32 AM
To: gcc-patches ; Jason Merrill
CC:
Subject: Change __cpp_concepts to __cpp_experimental_concepts
Jason,
My r
Hello!
> Please find attached the patch "pr16107.patch" that converts the pattern:-cos
> (-x) -> cos (x)
> Please review and let me know if its okay.
+/* { dg-do compile } */
+/* { dg-options "-O2 -fdump-tree-optimized" } */
+/* { dg-require-effective-target int32 } */
There are no integers in
Hi,
Please find attached the patch "pr16107.patch" that converts the pattern:-
cos (-x) -> cos (x)
Please review and let me know if its okay.
Regression tested on AARH64 and x86_64.
Thanks,
Naveen
2015-08-07 Naveen H.S
PR middle-end/16107
gcc/testsuite/ChangeLog:
Hi,
>> extend it - it should also work for non-INTEGER_CST
>> divisors and it should work for any kind of division, not just exact_div.
Please find attached the patch "pr25529.patch" that implements the pattern
for all divisors
Please review and let me know if its okay.
Regression tested
Hi!
This tiny patch moves ASan and TSan passes just before sanopt pass, that
gives nice speedup on several SPEC2006 tests (-O2 optimization level was
used) on x86:
TESTCASE ORIGINAL PATCHED SPEEDUP
401.bzip2806798 0.99%
403.gcc 506475 6.13%
429.mcf
On 13/07/15 13:55 +0300, Ville Voutilainen wrote:
+template
+struct __is_reference_wrapper : false_type
+{ };
Please indent the class-head and the body.
+template
+struct __is_reference_wrapper> : true_type
+{ };
Likewise.
+template
+constexpr auto make_array(_Types&&... __t)
Same he
On 21/07/15 00:49 +0300, Ville Voutilainen wrote:
Tested on Linux-PPC64.
2015-07-21 Ville Voutilainen
Implement N4279, Improved insertion interface for unique-key maps.
* include/bits/stl_map.h (try_emplace, insert_or_assign): New.
* include/bits/stl_tree.h (_M_get_insert_unique_pos,
On 20/07/15 00:28 +0300, Ville Voutilainen wrote:
Implement N4089 Safe conversions in unique_ptr (LWG 2118)
and N4366 LWG 2228: Missing SFINAE rule in unique_ptr
templated assignment
* include/bits/unique_ptr.h
(__remove_cv, __is_derived_Tp): Remove.
(default_delete::default_del
On Thu, Aug 06, 2015 at 05:16:33PM +0100, Jiong Wang wrote:
>
> James Greenhalgh writes:
>
> > On Tue, Jul 21, 2015 at 01:42:35PM +0100, Jiong Wang wrote:
> >>
> >> Jiong Wang writes:
> >>
> >> > Alexander Monakov writes:
> >> >
> >> >>> Attachment is the patch which repair -fno-plt support for
I've committed the attached tiny patch to fix PR target/67002
which is a 5/6 regression. sh_recog_treg_set_expr are called
unexpectedly during expand phase only when -g is specified and
it might cause -fcompare-debug failure. The patch is tested
on sh4-unknown-linux-gnu. I'll backport it to 5.
Jason,
My reading of
1.5 Feature-testing recommendations (Informative)
/2 ... The recommended macro name is __cpp_experimental_ followed by the
string in the “Macro
name suffix” column in Table 1. ...
Says change __cpp_concepts to __cpp_experimental_concepts
Cool beans on getting this in.
E
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