[gomp4.5] Handle #pragma omp declare target link

Hi! On Mon, Oct 26, 2015 at 20:49:40 +0100, Jakub Jelinek wrote: > On Mon, Oct 26, 2015 at 10:39:04PM +0300, Ilya Verbin wrote: > > > Without declare target link or to, you can't use the global variables > > > in orphaned accelerated routines (unless you e.g. take the address of the > > > mapped

Re: [PATCH] Fix inconsistent use of integer types in gcc/lto-streamer-out.c

On 11/16/2015 01:12 PM, Richard Biener wrote: On Sun, Nov 15, 2015 at 9:21 AM, Andris Pavenis wrote: This fixes use of pointers different unsigned integer types as function parameter. Function prototype is (see gcc/tree-streamer.h): bool streamer_tree_cache_lookup

Re: [PATCH, x86] Fix posix_memalign declaration in mm_malloc.h

On 16/11/15 13:42, Bernd Schmidt wrote: On 11/13/2015 11:30 PM, Marc Glisse wrote: +__asm__("posix_memalign"); Can't say I like the __asm__ after the #if/#else/#endif block. It might also cause trouble if some systems like to prepend an underscore, maybe? Yeah, that's one of the things I

Re: [PATCH][GCC] Make stackalign test LTO proof

On 16/11/15 15:34, Joern Wolfgang Rennecke wrote: I just happened to stumble on this problem with another port. The volatile & test solution doesn't work, though. What does work, however, is: __asm__ ("" : : "" (dummy)); I can confirm that Joern's solution works for me too.

Re: [1/2] i386 ROP mitigation: make more of regrename callable

On 11/16/2015 12:54 PM, Eric Botcazou wrote: Bootstrapped and tested on x86_64-linux. Ok? OK once the 2/2 patch is also approved. Thank you. The 2/2 has a small regrename piece to add target_data fields, are you OK with that as well? I'm assuming Uros will take a look at the rest. Bernd

Re: [PATCH][GCC][ARM] Disable neon testing for armv7-m

On Mon, Nov 16, 2015 at 10:49:11AM +, Andre Vieira wrote: > Hi, > > This patch changes the target support mechanism to make it > recognize any ARM 'M' profile as a non-neon supporting target. The > current check only tests for armv6 architectures and earlier, and > does not account for

[PATCH][AArch64] PR target/68363 Check that argument is real INSN in aarch64_madd_needs_nop

Hi all, This RTL checking ICE occurs when processing an rtx_insn* in aarch64_madd_needs_nop that apparently holds JUMP_TABLE_DATA. This shouldn't be passed to recog. So instead reject it with the INSN_P check. Such rtx_insns are not relevant to the code in aarch64_madd_needs_nop anyway.

Re: [PATCH] g++.dg/init/vbase1.C and g++.dg/cpp/ucn-1.C

On Mon, Nov 16, 2015 at 4:15 AM, Eric Botcazou wrote: >> No RISC architecture can store directly to MEM, so the expected RTL in >> g++.dg/init/vbase1.C is wrong. I am adding XFAIL for PowerPC. This >> probably should be disabled for ARM and other RISC architectures. > >

[PATCH][RTL-ree] PR rtl-optimization/68194: Restrict copy instruction in presence of conditional moves

Hi all, In this PR we encounter a wrong-code bug on x86_64. It started with an RTL if-conversion patch of mine which I believe exposed a latent issue in the ree (redundant extension elimination) pass. The different if-conversion behaviour enabled a new cse opportunity which then produced the

Re: [PATCH][GCC] Make stackalign test LTO proof

On 16/11/15 13:33, Richard Biener wrote: On Mon, Nov 16, 2015 at 12:43 PM, Andre Vieira wrote: On 13/11/15 10:34, Richard Biener wrote: On Thu, Nov 12, 2015 at 4:07 PM, Andre Vieira wrote: Hi, This patch changes this

Re: ping [aPATCH] Fix c++/67337 (segfault in mangle.c)

On 2015.08.31 at 11:31 +0200, Markus Trippelsdorf wrote: > On 2015.08.24 at 13:44 +0200, Markus Trippelsdorf wrote: another ping. > ping > > > decl_mangling_context() in mangle.c returns a NULL_TREE in case of > > template type parameters. write_template_prefix() needs to handle this > >

[AArch64] Rework ARMv8.1 command line options.

Hello, The command line options for target selection allow ARMv8.1 extensions to be individually enabled/disabled. They also allow the extensions to be enabled with -march=armv8-a. This doesn't reflect the ARMv8.1 architecture which requires all extensions to be enabled and doesn't make them

Re: [PATCH][GCC] Make stackalign test LTO proof

I just happened to stumble on this problem with another port. The volatile & test solution doesn't work, though. What does work, however, is: __asm__ ("" : : "" (dummy));

[PATCH] ctype functions and signedness

Hi, everyone. While it often (usually?) isn't an issue, passing a signed char to ctype functions is undefined. Here's the CERT entry: https://www.securecoding.cert.org/confluence/x/fAs This means that we need to cast chars to unsigned char before passing them to one of these functions.

Re: Gimple loop splitting

Hi, On Thu, 12 Nov 2015, Jeff Law wrote: > > this new pass implements loop iteration space splitting for loops that > > contain a conditional that's always true for one part of the iteration > > space and false for the other, i.e. such situations: > FWIW, Ajit suggested the same transformation

Re: Extend tree-call-cdce to calls whose result is used

Hi, On Mon, 16 Nov 2015, Richard Biener wrote: > >> Which would leave us with a lowering stage early in the main > >> optimization pipeline - I think fold_builtins pass is way too late > >> but any "folding" pass will do (like forwprop or backprop where the > >> latter might be better because

Re: [PATCH, 7/16] Add pass_dominator_oacc_kernels

On 11/11/15 12:05, Richard Biener wrote: On Mon, 9 Nov 2015, Tom de Vries wrote: On 09/11/15 16:35, Tom de Vries wrote: Hi, this patch series for stage1 trunk adds support to: - parallelize oacc kernels regions using parloops, and - map the loops onto the oacc gang dimension. The patch

Re: [PATCH][GCC] Make stackalign test LTO proof

On Mon, Nov 16, 2015 at 12:43 PM, Andre Vieira wrote: > On 13/11/15 10:34, Richard Biener wrote: >> >> On Thu, Nov 12, 2015 at 4:07 PM, Andre Vieira >> wrote: >>> >>> Hi, >>> >>>This patch changes this testcase to make sure LTO

Re: [PATCH] Allow embedded timestamps by C/C++ macros to be set externally (2)

On 11/15/2015 11:14 PM, Dhole wrote: gcc/c-family/ChangeLog: 2015-10-10 Eduard Sanou I can't find a previous change from you in the sources, so the first question would be whether you've gone through the copyright assignment process. Bernd

Re: [PATCH][i386]Migrate reduction optabs to reduc__scal

Hello Alan, On 16 Nov 12:23, Alan Lawrence wrote: > On 03/11/15 14:27, Alan Lawrence wrote: > >This migrates the various reduction optabs in sse.md to use the > >reduce-to-scalar > >form. I took the straightforward approach (equivalent to the migration code > >in > >expr.c/optabs.c) of

[Patch ARM] Add support for Cortex-A35

Hi, This patch adds support to the ARM back-end for the Cortex-A35 processor, as recently announced by ARM. The ARM Cortex-A35 provides full support for the ARMv8-A architecture, including the CRC extension, with optional Advanced-SIMD and Floating-Point support. We therefore set feature flags

Re: [PATCH][GCC][ARM] Disable neon testing for armv7-m

On 16/11/15 12:07, James Greenhalgh wrote: On Mon, Nov 16, 2015 at 10:49:11AM +, Andre Vieira wrote: Hi, This patch changes the target support mechanism to make it recognize any ARM 'M' profile as a non-neon supporting target. The current check only tests for armv6 architectures and

Re: Use combined_fn in tree-vrp.c

On Fri, Nov 13, 2015 at 12:27 PM, Richard Sandiford wrote: > Richard Biener writes: >> On Tue, Nov 10, 2015 at 1:09 AM, Bernd Schmidt wrote: >>> On 11/07/2015 01:46 PM, Richard Sandiford wrote: @@ -3814,8

Re: [PATCH 2/6] Make builtin_vectorized_function take a combined_fn

On Fri, Nov 13, 2015 at 1:27 PM, Richard Sandiford wrote: > Richard Biener writes: >> On Mon, Nov 9, 2015 at 5:25 PM, Richard Sandiford >> wrote: >>> This patch replaces the fndecl argument to

Re: [PATCH] g++.dg/init/vbase1.C and g++.dg/cpp/ucn-1.C

Hi David, On 14/11/15 00:33, David Edelsohn wrote: No RISC architecture can store directly to MEM, so the expected RTL in g++.dg/init/vbase1.C is wrong. I am adding XFAIL for PowerPC. This probably should be disabled for ARM and other RISC architectures. I observed the same problem in arm.

Re: [PATCH, 0/6] Remove first_pass_instance

On 11/15/2015 11:55 AM, Tom de Vries wrote: [ was: Re: [PATCH] Remove first_pass_instance from pass_vrp ] This patch series removes first_pass_instance. 1Remove first_pass_instance from pass_vrp 2Remove first_pass_instance from pass_reassoc 3Remove

Re: [PATCH, 5/16] Add in_oacc_kernels_region in struct loop

On Mon, 16 Nov 2015, Tom de Vries wrote: > On 11/11/15 11:55, Richard Biener wrote: > > On Mon, 9 Nov 2015, Tom de Vries wrote: > > > > > On 09/11/15 16:35, Tom de Vries wrote: > > > > Hi, > > > > > > > > this patch series for stage1 trunk adds support to: > > > > - parallelize oacc kernels

Re: [PATCH 6/6] Make SRA replace constant-pool loads

On Thu, Nov 12, 2015 at 7:35 PM, Alan Lawrence wrote: > On 06/11/15 16:29, Richard Biener wrote: 2) You should be able to use fold_ctor_reference directly (in place >>> of all your code in case offset and size are readily available - don't remember >>>

Re: [PATCH] PR/67682, break SLP groups up if only some elements match

On 13 November 2015 at 17:18, Alan Lawrence wrote: > On 10/11/15 12:51, Richard Biener wrote: >>> >>> Just noticing this... if we have a vectorization factor of 4 and matches >>> is 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0 then this will split into 1, 1, 1, 1 >>> and >>> 1, 1,

Re: [PATCH] [ARM, Callgraph] Fix PR67280: function incorrectly marked as nothrow

Backported r227407 to gcc-5-branch following approval on IRC. The patch applied without conflicts. 2015-11-16 Charles Baylis Backport from mainline r227407 PR ipa/67280 * cgraphunit.c (cgraph_node::create_wrapper): Set can_throw_external

Re: [PATCH][i386]Migrate reduction optabs to reduc__scal

On 03/11/15 14:27, Alan Lawrence wrote: This migrates the various reduction optabs in sse.md to use the reduce-to-scalar form. I took the straightforward approach (equivalent to the migration code in expr.c/optabs.c) of generating a vector temporary, using the existing code to reduce to that,

Re: [1/2] i386 ROP mitigation: make more of regrename callable

> Thank you. The 2/2 has a small regrename piece to add target_data > fields, are you OK with that as well? Sure. -- Eric Botcazou

Re: [PATCH, 10/16] Add pass_oacc_kernels pass group in passes.def

On Mon, 16 Nov 2015, Tom de Vries wrote: > On 11/11/15 12:02, Richard Biener wrote: > > On Mon, 9 Nov 2015, Tom de Vries wrote: > > > > > On 09/11/15 16:35, Tom de Vries wrote: > > > > Hi, > > > > > > > > this patch series for stage1 trunk adds support to: > > > > - parallelize oacc kernels

Re: Extend tree-call-cdce to calls whose result is used

On Fri, Nov 13, 2015 at 2:12 PM, Richard Sandiford wrote: > Richard Biener writes: >> On Mon, Nov 9, 2015 at 10:03 PM, Michael Matz wrote: >>> Hi, >>> >>> On Mon, 9 Nov 2015, Richard Sandiford wrote: >>> +static bool

Re: [PATCH v4] SH FDPIC backend support

On Sun, 2015-11-15 at 15:39 -0500, Rich Felker wrote: > > This is basically the same as above ... it's not possible to > > conditionally construct/modify pattern descriptions in the .md. > > However, it's possible to modify the CALL_INSN_FUNCTION_USAGE > > field of > > call insns -- for some

[Obvious][AArch64] Fix gcc.target/aarch64/vclz.c

The scan-assembler vclz2s 34 test in here has been failing since r230091: * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Make equal cost favor vectorized version. which transforms a load of piecewise array assignments (in tree) into 2-element-vector writes to MEMs,

Re: [PATCH] Allow embedded timestamps by C/C++ macros to be set externally (2)

On 11/16/2015 02:05 PM, Bernd Schmidt wrote: > On 11/15/2015 11:14 PM, Dhole wrote: >> gcc/c-family/ChangeLog: >> >> 2015-10-10 Eduard Sanou > > I can't find a previous change from you in the sources, so the first > question would be whether you've gone through the

[Patch AArch64] Add support for Cortex-A35

Hi, This patch adds support to the AArch64 back-end for the Cortex-A35 processor, as recently announced by ARM. The ARM Cortex-A35 provides full support for the ARMv8-A architecture, including the CRC extension, with optional Advanced-SIMD and Floating-Point support. We therefore set feature

Re: [PATCH, 0/6] Remove first_pass_instance

On 16/11/15 13:09, Bernd Schmidt wrote: On 11/15/2015 11:55 AM, Tom de Vries wrote: [ was: Re: [PATCH] Remove first_pass_instance from pass_vrp ] This patch series removes first_pass_instance. 1Remove first_pass_instance from pass_vrp 2Remove first_pass_instance from

Re: [PATCH, x86] Fix posix_memalign declaration in mm_malloc.h

On 11/13/2015 11:30 PM, Marc Glisse wrote: +__asm__("posix_memalign"); Can't say I like the __asm__ after the #if/#else/#endif block. It might also cause trouble if some systems like to prepend an underscore, maybe? Yeah, that's one of the things I had in mind when I suggested moving this

[SH][committed] Fix PR 68277

Hi, The attached patch fixes PR 68277. Tested by Kaz on trunk on sh4-linux. I've also done a sanity check on GCC 5 branch with "make all" on sh-elf. Committed to trunk as r230425 and to GCC 5 branch as r230426. Cheers, Oleg gcc/ChangeLog: PR target/68277 * config/sh/sh.md

Re: [PATCH][GCC] Make stackalign test LTO proof

On Mon, Nov 16, 2015 at 3:08 PM, Andre Vieira wrote: > On 16/11/15 13:33, Richard Biener wrote: >> >> On Mon, Nov 16, 2015 at 12:43 PM, Andre Vieira >> wrote: >>> >>> On 13/11/15 10:34, Richard Biener wrote: On Thu,

[PATCH] Fix PR68306 (and 68367)

I made a copy error in the prev rev. Committed as obvious. Richard. 2015-11-16 Richard Biener * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Fix bogus copying from verify_data_ref_alignment and use continue instead of return. Index:

[PATCH][install.texi] Add note against GNAT 4.8 on ARM targets.

This follows from the discussion here: https://gcc.gnu.org/ml/gcc/2015-10/msg00082.html . OK for trunk? --Alan gcc/ChangeLog: doc/install.texi: Add note against GNAT 4.8 on ARM targets. --- gcc/doc/install.texi | 2 ++ 1 file changed, 2 insertions(+) diff --git

Re: [AArch64] Rework ARMv8.1 command line options.

On Mon, Nov 16, 2015 at 8:31 AM, Matthew Wahab wrote: > Hello, > > The command line options for target selection allow ARMv8.1 extensions > to be individually enabled/disabled. They also allow the extensions to > be enabled with -march=armv8-a. This doesn't reflect the

Re: [PATCH] Implement GOMP_OFFLOAD_unload_image in intelmic plugin

On Tue, Sep 08, 2015 at 22:41:17 +0300, Ilya Verbin wrote: > This patch supports unloading of target images from the device. > Unfortunately __offload_unregister_image requires the whole descriptor for > unloading, which must contain target code inside, for this reason the plugin > keeps

[committed] Use RECORD_OR_UNION_TYPE_P in c-family/

While waiting for a build to finish I figured I might as well do this. Bootstrapped/regtested on x86_64-linux, applying to trunk. 2015-11-16 Marek Polacek * c-ada-spec.c (dump_ada_template): Use RECORD_OR_UNION_TYPE_P. * c-common.c

Re: [PATCH][RTL-ree] PR rtl-optimization/68194: Restrict copy instruction in presence of conditional moves

On 11/16/2015 03:07 PM, Kyrill Tkachov wrote: I've explained in the comments in the patch what's going on but the short version is trying to change the destination of a defining insn that feeds into an extend insn is not valid if the defining insn doesn't feed directly into the extend insn. In

Re: [PATCH 00/16] Unit tests framework (v3)

On Mon, 2015-11-16 at 19:17 +0100, Bernd Schmidt wrote: > So Jeff and I just had a chat, and we came up with some thoughts about > how to proceed. I think we both agree that it would be good to have a > special testing backend, along with frontends designed to be able to > read in gimple or rtl

Re: [Patch ARM] Add support for Cortex-A35

On 16/11/15 14:42, James Greenhalgh wrote: Hi, This patch adds support to the ARM back-end for the Cortex-A35 processor, as recently announced by ARM. The ARM Cortex-A35 provides full support for the ARMv8-A architecture, including the CRC extension, with optional Advanced-SIMD and

RE: [RFC, Patch]: Optimized changes in the register used inside loop for LICM and IVOPTS.

-Original Message- From: Jeff Law [mailto:l...@redhat.com] Sent: Friday, November 13, 2015 11:44 AM To: Ajit Kumar Agarwal; GCC Patches Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala Subject: Re: [RFC, Patch]: Optimized changes in the register used inside

RE: [RFC, Patch]: Optimized changes in the register used inside loop for LICM and IVOPTS.

Sorry I missed out some of the points in earlier mail which is given below. -Original Message- From: Ajit Kumar Agarwal Sent: Monday, November 16, 2015 11:07 PM To: 'Jeff Law'; GCC Patches Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala Subject: RE: [RFC,

Re: [PATCH] Improve BB vectorization dependence analysis

On 09/11/15 12:55, Richard Biener wrote: Currently BB vectorization computes all dependences inside a BB region and fails all vectorization if it cannot handle some of them. This is obviously not needed - BB vectorization can restrict the dependence tests to those that are needed to apply the

Re: [PATCH] Add configure flag for operator new (std::nothrow)

On 11/10/2015 01:10 PM, Jonathan Wakely wrote: > On 06/11/15 09:59 +, Pedro Alves wrote: >> On 11/06/2015 01:56 AM, Jonathan Wakely wrote: >>> On 5 November 2015 at 23:31, Daniel Gutson >> The issue is, as I understand it, to do the actual work of operator new, i.e. allocate memory.

[C++ PATCH] Fix ICE with NOP_EXPRs in check_case_bounds (PR c++/68362)

This patch ought to fix a regression introduced by the C++ delayed folding merge. What happens here for this testcase is that in c_add_case_label we convert "0" to NOP_EXPR: "(const A) 0" in convert_and_check. We pass this to check_case_bounds which only expects INTEGER_CSTs. Since we can't use

Re: [2/2] i386 ROP mitigation

On Fri, Nov 13, 2015 at 9:47 PM, Bernd Schmidt wrote: > This adds a new -mmitigate-rop option to the i386 port. The idea is to > mitigate against certain forms of attack called "return oriented > programming" that some of our security folks are concerned about. The basic >

Re: [PATCH 00/16] Unit tests framework (v3)

So Jeff and I just had a chat, and we came up with some thoughts about how to proceed. I think we both agree that it would be good to have a special testing backend, along with frontends designed to be able to read in gimple or rtl that can be operated on. That's more of a long-term thing.

Re: [C++ PATCH] Fix ICE with NOP_EXPRs in check_case_bounds (PR c++/68362)

OK. Jason

[PATCH] Clear LOOP_CLOSED_SSA after pass_ccp

Hi, while playing around with inserting pass_ccp here and there in the pass list, I put it after a pass where the loops state contained LOOP_CLOSED_SSA. And apparently pass_ccp does not preserve loop-closed ssa. As a consequence, during executing the pass_ccp todos, verify_loop_closed_ssa

Re: [PATCH] Fix uninitialized src_range within c_expr (Re: libcpp/C FE source range patch committed (r230331))

On 11/16/2015 09:50 PM, David Malcolm wrote: The root cause is uninitialized data. Specifically, the C parser's struct c_expr gained a "src_range" field, and it turns out there are a few places where I wasn't initializing this when returning c_expr instances on the stack, and in some cases the

[gomp4, ptx] worker & gang complex double reductions

I've committed this patch to the gomp4 branch. It adds support for worker and gang level complex double reductions. For smaller reductions, we continue to use the type punning of a VIEW_CONVERT_EXPR, so we can use the hw-provided compare & swap primitive. For 128 bit types, there is no such

Re: [PATCH] libstdc++: Fix libstdc++/67440: pretty-printing of a const set fails

On 16/11/15 21:04 +, Doug Evans wrote: Hi. Apologies for the delay. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67440 Tested with current trunk. 2015-11-16 Doug Evans PR libstdc++/67440 * python/libstdcxx/v6/printers.py (find_type): Handle "const" in

Re: Add null identifiers to genmatch

Jeff Law writes: Boolean params are best avoided if possible, IMO. In this case, it seems this could instead be a new wrapper function, like: >>> This hasn't been something we've required for GCC.I've come across >>> this recommendation a few times over the last

[PATCH, applied] Fixup PowerPC error from my last commit

In my last commit, I had a case where the mode iterator (VSX_L, FMOVE128_GPR) used IFmode (IBM extended double) in code that was only meant for 128-bit types that fit in a single vector. In the case of VSX_L, it had a condition on the iterator, that would never be true for IFmode. But it didn't

[patch] FreeBSD x86_64/i386 apply r125920

Hi all, I'm going to apply the below patch to trunk if there are no objections. There are no regressions. From our pov, we should be in sync with Linux here. Also, I'm going to push this one out to 5.x after one week. Thanks, Andreas 2015-11-16 Andreas Tobler

[PATCH] Make fdump-tree-sccp-details more complete

Hi, pass_scev_cprop contains a bit where it replaces uses of an ssa-name with constants. This is currently not noted in the dump-file, even with TDF_DETAILS. This patch adds that information in the dump-file, in this format: ... Replacing uses of: D__lsm.10_34 with: 1 ... OK for trunk

Re: [PATCH] Clear LOOP_CLOSED_SSA after pass_ccp

On 11/16/2015 02:33 PM, Tom de Vries wrote: Hi, while playing around with inserting pass_ccp here and there in the pass list, I put it after a pass where the loops state contained LOOP_CLOSED_SSA. And apparently pass_ccp does not preserve loop-closed ssa. As a consequence, during executing

Incorrect code due to indirect tail call of varargs function with hard float ABI

Following testcase fails on ARM (from https://bugs.linaro.org/show_bug.cgi?id=1900). __attribute__ ((noinline)) double direct(int x, ...) { return x*x; } __attribute__ ((noinline)) double broken(double (*indirect)(int x, ...), int v) { return indirect(v); } int main () { double d1, d2;

Re: [PATCH] Fix inconsistent use of integer types in gcc/lto-streamer-out.c

On 11/16/2015 09:22 AM, Andris Pavenis wrote: On 11/16/2015 01:12 PM, Richard Biener wrote: On Sun, Nov 15, 2015 at 9:21 AM, Andris Pavenis wrote: This fixes use of pointers different unsigned integer types as function parameter. Function prototype is (see

[PATCH] Fix uninitialized src_range within c_expr (Re: libcpp/C FE source range patch committed (r230331))

On Sat, 2015-11-14 at 23:32 -0500, David Malcolm wrote: > On Sat, 2015-11-14 at 09:50 -0500, David Edelsohn wrote: > > This patch causes numerous new testsuite failure on AIX caused by the > > compiler crashing during compilation, e.g. > > > > gcc.c-torture/execute/20020206-1.c > > > > in GCC

[PATCH] libstdc++: Fix libstdc++/67440: pretty-printing of a const set fails

Hi. Apologies for the delay. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67440 Tested with current trunk. 2015-11-16 Doug Evans PR libstdc++/67440 * python/libstdcxx/v6/printers.py (find_type): Handle "const" in type name. *

Re: Add null identifiers to genmatch

On 11/16/2015 01:15 PM, Pedro Alves wrote: Hi Jeff, (Sorry I didn't reply sooner, I was OOO.) No worries. Boolean params are best avoided if possible, IMO. In this case, it seems this could instead be a new wrapper function, like: This hasn't been something we've required for GCC.I've

Re: Add null identifiers to genmatch

Hi Jeff, (Sorry I didn't reply sooner, I was OOO.) On 11/08/2015 11:17 PM, Jeff Law wrote: > On 11/07/2015 07:31 AM, Pedro Alves wrote: >> Hi Richard, >> >> Passerby comment below. >> >> On 11/07/2015 01:21 PM, Richard Sandiford wrote: >>> -/* Lookup the identifier ID. */ >>> +/* Lookup the

Re: [ARM] Fix PR middle-end/65958

> More comments inline. Revised version attached, which addresses all your comments and in particular removes the +#if PROBE_INTERVAL > 4096 +#error Cannot use indexed addressing mode for stack probing +#endif compile-time assertion. It generates the same code for PROBE_INTERVAL == 4096 as

Re: [PATCH] PR 68366 - include emit-rtl.h in sdbout.c

On 11/15/2015 07:27 PM, tbsaunde+...@tbsaunde.org wrote: From: Trevor Saunders Some of the pa target macros rely on macros in emit-rtl.h and sdbout.c uses some of those macros, which means that sdbout.c needs to include emit-rtl.h. this seems obvious, bootstrapped

Re: [PATCH 00/16] Unit tests framework (v3)

For some of the simpler infrastructure tests such as the ones in this patch kit (bitmap, vec or wide-int functionality testing and such), we had the idea of putting these into every ENABLE_CHECKING compiler, and run them after building stage1, controlled by a -fself-test flag. It's better to

Re: [PATCH] Allow embedded timestamps by C/C++ macros to be set externally (2)

On Sun, 15 Nov 2015, Dhole wrote: > The error output in gcc/c-family/c-common.c (get_source_date_epoch) is > handled by an fprintf() to stderr followed by an exit (EXIT_FAILURE). I > am not sure this is the right approach for error handling, as I have > found many usages of the error() function

Re: Another boot strap fix

On Mon, 16 Nov 2015, Andi Kleen wrote: > diff --git a/gcc/configure b/gcc/configure > index d5f6dd4..1f68744 100755 > --- a/gcc/configure > +++ b/gcc/configure > @@ -11794,10 +11794,11 @@ rm -f conftest.out > > cat > configargs.h < /* Generated automatically. */ > -static const char

Re: [PR64164] drop copyrename, integrate into expand

On Nov 13, 2015, Jeff Law wrote: > On 11/11/2015 11:10 AM, Alexandre Oliva wrote: >> On Nov 10, 2015, Jeff Law wrote: >> * function.c (assign_parm_setup_block): Right-shift upward-padded big-endian args when bypassing the stack slot. >>> Don't you

Re: [PATCH] ctype functions and signedness

DJ Delorie wrote: > > > --- libiberty/pex-win32.c > > +++ /tmp/cocci-output-25924-3a75ca-pex-win32.c > > @@ -547,8 +547,8 @@ env_compare (const void *a_ptr, const vo > > > >do > > { > > - c1 = (unsigned char) tolower (*a++); > > - c2 = (unsigned char) tolower (*b++); > > +

Re: [PATCH], PowerPC IEEE 128-bit patch #8 (libgcc bits, revised)

On Fri, 13 Nov 2015, Michael Meissner wrote: > This patch should address the following IEEE problems with the libgcc emulator > with exceptions, etc. Steve is working on patches to libdfp for Decimal > conversions. Are the libgcc2.c functions for KFmode and the corresponding complex mode

Re: Add null identifiers to genmatch

On Nov 16, 2015, at 1:52 PM, Richard Sandiford wrote: > > Yeah. Kenny was adamant that for wide-int we should have an UNSIGNED/SIGNED Yeah, you can blame me. I think (, UNSIGNED) conveys more than (,true) or (,false). The sad part is, this has always been true. >

Re: C++ PATCH to integrate c++-delayed-folding branch

On 11/16/2015 04:12 PM, Joseph Myers wrote: On Fri, 13 Nov 2015, Jason Merrill wrote: In the future we probably want to move many of these warnings into language-independent code so we can avoid folding for them in the front end; we also shouldn't need to fold during genericization, but

Re: [PATCH, 10/16] Add pass_oacc_kernels pass group in passes.def

On 16/11/15 13:45, Richard Biener wrote: + NEXT_PASS (pass_scev_cprop); > > > >What's that for? It's supposed to help removing loops - I don't > >expect kernels to vanish. > >I'm using pass_scev_cprop for the "final value replacement" functionality. >Added comment. That

Re: Gimple loop splitting

On 11/16/2015 09:05 AM, Michael Matz wrote: It's a prerequisite indeed, but not enough in itself. Sigh. OK. One can always hope. hmmer is actually quite interesting because it's a fairly isolated hot loop posing quite challenging problems for us :) Sounds like it. Essentially, it's a

Aw: Re: TR1 Special Math

Hi all, just a quick note that I'm still around... Any particular pointers how I can help in improving the implementation? Cheers, Florian. > Gesendet: Samstag, 14. November 2015 um 21:40 Uhr > Von: "Ed Smith-Rowland" <3dw...@verizon.net> > An: "Jonathan Wakely" > Cc:

Re: C++ PATCH to integrate c++-delayed-folding branch

On Fri, 13 Nov 2015, Jason Merrill wrote: > In the future we probably want to move many of these warnings into > language-independent code so we can avoid folding for them in the front end; > we also shouldn't need to fold during genericization, but apparently not doing > that leads to

Re: [PATCH 00/16] Unit tests framework (v3)

On 11/16/2015 11:48 AM, David Malcolm wrote: For some of the simpler infrastructure tests such as the ones in this patch kit (bitmap, vec or wide-int functionality testing and such), we had the idea of putting these into every ENABLE_CHECKING compiler, and run them after building stage1,

Re: Incorrect code due to indirect tail call of varargs function with hard float ABI

On 16 November 2015 at 22:24, Kugan wrote: > Please note that we have a sibcall from "broken" to "indirect". > > "direct" is variadic function so it is conforming to AAPCS base standard. > > "broken" is a non-variadic function and will return the value in >

[PATCH] Fix PR68117 (hopefully)

In r229405 I removed a call to redirect_edge_var_map_destroy from delete_tree_ssa which I thought cannot be necessary because that map isn't GCed and thus stale data in it should have caused quite some havoc otherwise. Turns out I was wrong ;) We were lucky instead. The following patch amends

Re: [PATCH] Fix obvious typo that breaks boot strap in delayed folding

Eric Botcazou writes: > I personally don't and bootstrap works fine probably because the bug is fixed. No, the bug still exists. Try --enable-checking=release. Andreas. -- Andreas Schwab, sch...@linux-m68k.org GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5

Re: [PATCH, 5/16] Add in_oacc_kernels_region in struct loop

On 11/11/15 11:55, Richard Biener wrote: On Mon, 9 Nov 2015, Tom de Vries wrote: On 09/11/15 16:35, Tom de Vries wrote: Hi, this patch series for stage1 trunk adds support to: - parallelize oacc kernels regions using parloops, and - map the loops onto the oacc gang dimension. The patch

Re: [PATCH, 5/16] Add in_oacc_kernels_region in struct loop

On 11/11/15 11:55, Richard Biener wrote: On Mon, 9 Nov 2015, Tom de Vries wrote: On 09/11/15 16:35, Tom de Vries wrote: Hi, this patch series for stage1 trunk adds support to: - parallelize oacc kernels regions using parloops, and - map the loops onto the oacc gang dimension. The patch

Re: [PATCH][GCC] Make stackalign test LTO proof

On 13/11/15 10:34, Richard Biener wrote: On Thu, Nov 12, 2015 at 4:07 PM, Andre Vieira wrote: Hi, This patch changes this testcase to make sure LTO will not optimize away the assignment of the local array to a global variable which was introduced to make

Re: [PATCH] Fix obvious typo that breaks boot strap in delayed folding

> No, the bug still exists. Try --enable-checking=release. Ah, OK, so tree checking somehow works around it I presume. -- Eric Botcazou

Re: [1/2] i386 ROP mitigation: make more of regrename callable

> Bootstrapped and tested on x86_64-linux. Ok? OK once the 2/2 patch is also approved. -- Eric Botcazou

Re: [PATCH, 10/16] Add pass_oacc_kernels pass group in passes.def

On 11/11/15 12:02, Richard Biener wrote: On Mon, 9 Nov 2015, Tom de Vries wrote: On 09/11/15 16:35, Tom de Vries wrote: Hi, this patch series for stage1 trunk adds support to: - parallelize oacc kernels regions using parloops, and - map the loops onto the oacc gang dimension. The patch

Re: [PATCH, 9/16] Add pass_parallelize_loops_oacc_kernels

On 09/11/15 20:52, Tom de Vries wrote: On 09/11/15 16:35, Tom de Vries wrote: Hi, this patch series for stage1 trunk adds support to: - parallelize oacc kernels regions using parloops, and - map the loops onto the oacc gang dimension. The patch series contains these patches: 1

C++ PATCH to __builtin_constant_p handling

The delayed folding merge inadvertently changed the semantics of __builtin_constant_p so that it would only be true for a C++ constant expression, which is a more restricted set than expressions that GCC can fold to a constant. In particular, (non-constant && false) is not a C++ constant

Re: [RFC, Patch]: Optimized changes in the register used inside loop for LICM and IVOPTS.

On 11/16/2015 10:36 AM, Ajit Kumar Agarwal wrote: For Induction variable optimization on tree SSA representation, the register used logic is based on the number of phi nodes at the loop header to represent the liveness at the loop. Current Logic used only the number of phi nodes at the loop

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