Re: [PATCH 2/2] [ARM] PR68532 Fix up vzip recognition for big endian

Committed to trunk as r233252 On 9 February 2016 at 17:07, Charles Baylis wrote: > On 8 February 2016 at 11:42, Kyrill Tkachov > wrote: > >> On 03/02/16 18:59, charles.bay...@linaro.org wrote: >>> --- a/gcc/config/arm/arm.c >>> +++

[PATCH] [target/65867] FIx bootstrap failure on mingw32

This was actually approved by Kai in the BZ eons ago. I've installed the patch on the trunk. Essentially there's a missing #include for mingw32 that prevents libssp from building. Jeff commit d48dbf6568626d96cc948d8aaf7ef0265689a213 Author: law

Re: C++ PATCH for c++/69657 (abs not inlined)

Jason Merrill writes: > The issue in this bug was that due to changes in the libstdc++ headers, the > built-in abs declaration was getting hidden by a using-declaration, so that > then when the built-in got an explicit declaration, the original > declaration wasn't there

[PATCH] PR other/69554: avoid excessive source printing for widely-separated locations

PR other/69554 describes a regression seen from the Fortran frontend when issuing a diagnostic containing more than one location: if the locations are within the same file (and hence not filtered by the existing sanitization code), diagnostic_show_locus could print all of the lines of the source

Re: [PATCH 1/2] [ARM] PR68532: Fix up vuzp for big endian

On 9 February 2016 at 17:08, Kyrill Tkachov wrote: > > On 09/02/16 17:00, Charles Baylis wrote: >> >> On 8 February 2016 at 11:42, Kyrill Tkachov >> wrote: >>> >>> Hi Charles, >>> >>> >>> On 03/02/16 18:59, charles.bay...@linaro.org

Re: [PATCH] PR driver/69265: improved suggestions for various misspelled options

Ping. This is a bug in a new feature, so it isn't a regression as such, but it's fairly visible, and I believe the fix is relatively low-risk (error-handling of typos of command-line options). This also now covers PR driver/69453 (and its duplicate PR driver/69642), so people *are* running

New Finnish PO file for 'cpplib' (version 6.1-b20160131)

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Re: [PATCH, PR69599] Fix GOMP/GOACC_parallel optimization in ipa-pta

On Mon, 8 Feb 2016, Tom de Vries wrote: > On 08/02/16 11:54, Richard Biener wrote: > > On Mon, 8 Feb 2016, Tom de Vries wrote: > > > > > Hi, > > > > > > when compiling the fipa-pta tests in the libgomp testsuite > > > (omp-nested-2.c, > > > pr46032.c) with -flto -flto-partition=max, the tests

Re: Combine simplify_set WORD_REGISTER_OPERATIONS

On Mon, Feb 08, 2016 at 09:27:36AM -0700, Jeff Law wrote: > On 01/31/2016 03:16 PM, Alan Modra wrote: > >The comment says this test is supposed to prevent "a narrower > >operation than requested", but it actually only allows a larger > >subreg, not one the same size. Fix that. > > > >Bootstrapped

New German PO file for 'gcc' (version 6.1-b20160131)

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Re: [Patch] Gate vect-mask-store-move-1.c correctly, and actually output the dump

On Mon, Feb 08, 2016 at 03:24:14PM +0100, Richard Biener wrote: > On Mon, Feb 8, 2016 at 2:40 PM, James Greenhalgh > wrote: > > On Mon, Feb 08, 2016 at 04:29:31PM +0300, Yuri Rumyantsev wrote: > >> Hi James, > >> > >> Thanks for reporting this issue. > >> I prepared

[PATCH] Fix PR69715

The following fixes update-address-taken to properly reject rewriting decls into SSA that require fixup of call lhs because that's not done. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2016-02-09 Richard Biener PR

[PATCH PR69052]Check if loop inv can be propagated into mem ref with additional addr expr canonicalization

Hi, When counting cost for loop inv, GCC checks if a loop inv can be propagated into its use site (a memory reference). If it cannot be propagated, we increase its cost so that it's expensive enough to be hoisted out of loop. Currently we simply replace loop inv register in the use site with

Re: [Patch] Gate vect-mask-store-move-1.c correctly, and actually output the dump

On Tue, Feb 9, 2016 at 12:24 PM, James Greenhalgh wrote: > > On Mon, Feb 08, 2016 at 03:24:14PM +0100, Richard Biener wrote: >> On Mon, Feb 8, 2016 at 2:40 PM, James Greenhalgh >> wrote: >> > On Mon, Feb 08, 2016 at 04:29:31PM +0300, Yuri

Re: testsuite fix

On 08/02/16 17:48 -0800, Mike Stump wrote: I’m running the pretty printer test cases on a target with status wrappers, and that system works by printing the return code on that output. It is dependent upon the last line being terminated by “\n”, as the code that looks for the return code

Re: Fix PR67639

On 08.02.2016 15:26, Bernd Schmidt wrote: On 12/21/2015 08:39 PM, Jeff Law wrote: On 12/18/2015 11:38 AM, Bernd Schmidt wrote: In an earlier fix, the following change was made in varasm.c for invalid register variables: --- trunk/gcc/varasm.c2014/08/26 14:59:59214525 +++

openacc reference reductions

This patch teaches omp-lower how handle reference-typed reductions, which are common in fortran subroutines. Unlike the implementation in gomp4 branch, this patch doesn't rewrite the reference reduction variables as local variables. Instead, a local copy is created for reduction variable. There

Re: openacc reference reductions

While I've not looked at the rest of the patch, this bit stood out: +static bool +is_oacc_parallel_reduction (tree var, omp_context *ctx) +{ + if (!is_oacc_parallel (ctx)) +return false; + + tree clauses = gimple_omp_target_clauses (ctx->stmt); + + /* Don't install a local copy of the

Re: [openacc] reference-typed data mappings

On 02/01/2016 09:57 AM, Cesar Philippidis wrote: > This patch fixes a couple of bugs preventing c++ reference-typed > variables from working in openacc data clauses. These fixes include: > > * Teach the gimplifier to filter out pointer data mappings for >OACC_DATA, OACC_ENTER_DATA,

[PATCH] Fix gcc.dg/vect/vect-mask-store-move-1.c

Tested on x86_64-linux. 2016-02-09 Richard Biener * gcc.dg/vect/vect-mask-store-move-1.c: Add missing space. Index: gcc/testsuite/gcc.dg/vect/vect-mask-store-move-1.c === ---

Re: [PATCH] S/390: PR 69625: Add test case

On Fri, Feb 05, 2016 at 05:07:57PM +0100, Dominik Vogt wrote: > The attached patch adds a testcase for PR 69625. Version 2 also runs with -m31. Ciao Dominik ^_^ ^_^ -- Dominik Vogt IBM Germany ChangeLog * gcc.target/s390/pr69625.c: Add test case. >From

Re: [Patch] Gate vect-mask-store-move-1.c correctly, and actually output the dump

On Tue, Feb 09, 2016 at 11:24:57AM +, James Greenhalgh wrote: Also tested on i686-linux (32-bit), where it previously FAILed too. > 2016-02-09 James Greenhalgh > > * gcc.dg/vect/vect-mask-store-move-1.c: Drop dg-options directive, > gate check on

[PATCH] Fix PR69726

It turns out if-conversions poor job on if (a) x[i] = ...; else x[i] = ...; results in bogus uninit warnings of x[i] for a variety of reasons. First of all forwprop (aka match.pd simplification) doesn't fixup all of if-conversions poor job as canonicalization sometimes inverts the

Re: [PATCH PR69652, Regression]

On Fri, Feb 5, 2016 at 3:54 PM, Yuri Rumyantsev wrote: > Hi All, > > Here is updated patch - I came back to move call statements also since > masked loads are presented by internal call. I also assume that for > the following simple loop > for (i = 0; i < n; i++) > if

Re: openacc reference reductions

On 02/09/2016 07:33 AM, Nathan Sidwell wrote: > While I've not looked at the rest of the patch, this bit stood out: > >> +static bool >> +is_oacc_parallel_reduction (tree var, omp_context *ctx) >> +{ >> + if (!is_oacc_parallel (ctx)) >> +return false; >> + >> + tree clauses =

Re: [RFC] Combine vectorized loops with its scalar remainder.

On 02/09/2016 09:09 AM, Ilya Enkovich wrote: Another option is to peel scalar loop and then just run vectorizer one more time to vectorize and mask it. Also we may peel vectorized loop and use original version (with all STMT_VINFO still available) as a tail and peeled version as a main loop.

RE: [PATCH] [ARC] Add single/double IEEE precission FPU support.

Please find attached a reworked patch. It doesn't contain the ABI modifications as I notified you earlier in an email. Also, you may have extra comments regarding these original observations: >+ /* ARCHS has 64-bit data-path which makes use of the even-odd paired >+ registers. */ >+ if

Re: [RFC] Combine vectorized loops with its scalar remainder.

2015-12-15 19:41 GMT+03:00 Yuri Rumyantsev : > Hi Richard, > > I re-designed the patch to determine ability of loop masking on fly of > vectorization analysis and invoke it after loop transformation. > Test-case is also provided. > > what is your opinion? > > Thanks. > Yuri. >

Re: [ARM] Use vector wide add for mixed-mode adds

Hi Michael, On 17/12/15 00:02, Michael Collison wrote: Kyrill, I have attached a patch that address your comments. The only change I would ask you to re-consider renaming is the function 'bool aarch32_simd_check_vect_par_cnst_half'. This function was copied from the aarch64 port and I thought

Re: [PATCH 1/2] [ARM] PR68532: Fix up vuzp for big endian

On 8 February 2016 at 11:42, Kyrill Tkachov wrote: > Hi Charles, > > > On 03/02/16 18:59, charles.bay...@linaro.org wrote: >> >> --- a/gcc/config/arm/arm.c >> +++ b/gcc/config/arm/arm.c >> @@ -28208,6 +28208,35 @@ arm_expand_vec_perm (rtx target, rtx op0, rtx >> op1,

Re: [PATCH 2/2] [ARM] PR68532 Fix up vzip recognition for big endian

On 8 February 2016 at 11:42, Kyrill Tkachov wrote: > On 03/02/16 18:59, charles.bay...@linaro.org wrote: >> --- a/gcc/config/arm/arm.c >> +++ b/gcc/config/arm/arm.c >> @@ -28318,15 +28318,21 @@ arm_evpc_neon_vzip (struct expand_vec_perm_d *d) >> unsigned int i,

Re: [openacc] reference-typed data mappings

On 02/09/2016 07:00 AM, Cesar Philippidis wrote: > On 02/01/2016 09:57 AM, Cesar Philippidis wrote: > >> > This patch fixes a couple of bugs preventing c++ reference-typed >> > variables from working in openacc data clauses. These fixes include: >> > >> > * Teach the gimplifier to filter out

Re: [PATCH 1/2] [ARM] PR68532: Fix up vuzp for big endian

On 09/02/16 17:00, Charles Baylis wrote: On 8 February 2016 at 11:42, Kyrill Tkachov wrote: Hi Charles, On 03/02/16 18:59, charles.bay...@linaro.org wrote: --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -28208,6 +28208,35 @@ arm_expand_vec_perm (rtx

[PATCH][ARM][RFC] PR target/65578 Fix gcc.dg/torture/stackalign/builtin-apply-4.c for single-precision fpus

Hi all, In this wrong-code PR the builtin-apply-4.c test fails with -flto but only when targeting an fpu with only single-precision capabilities. bar is a function returing a double. For non-LTO compilation the caller of bar reads the return value from it from the s0 and s1 VFP registers like

Re: [PATCH][ARM][RFC] PR target/65578 Fix gcc.dg/torture/stackalign/builtin-apply-4.c for single-precision fpus

On 09/02/16 17:21, Kyrill Tkachov wrote: Hi all, In this wrong-code PR the builtin-apply-4.c test fails with -flto but only when targeting an fpu with only single-precision capabilities. bar is a function returing a double. For non-LTO compilation the caller of bar reads the return value

Re: [PATCH, rs6000] Add -maltivec=be semantics in LE mode for vec_ld and vec_st

Hi Bill, > 2014-02-20 Bill Schmidt > > * config/rs6000/altivec.md (altivec_lvxl): Rename as > *altivec_lvxl__internal and use VM2 iterator instead of > V4SI. > (altivec_lvxl_): New define_expand incorporating > -maltivec=be semantics

[wwwdocs] Document null 'this' dereference issue in /gcc-6/porting_to.html

This adds a note to the porting document about the (shockingly widespread) problem of calling member functions through null pointers, which GCC 6 no longer tolerates. Following some comments about (bool)os I'm also tweaking another part of the doc to use the plusplusgood static_cast form.

Re: [PATCH], PR target/68404, Fix PowerPC fusion error

On Tue, Feb 9, 2016 at 9:49 AM, Michael Meissner wrote: > This bug fixes PR 68404, which created an insn for the fusion operation when > accessing an array with a large constant offset that the downstream passes > (regrenam in particular don't like). Because fusion

Re: [PR69634] fix debug_insn-inconsistent REG_N_CALLS_CROSSED

On 02/06/2016 03:06 AM, Alexandre Oliva wrote: The testcase has a debug insn referencing a pseudo right before an insn that modifies the pseudo. Without debug insns, REG_N_CALLS_CROSSED was zero for that pseudo, so sched_analyze_reg added a dep between the pseudo setter and an earlier

Re: [patch, fortran] PR56007 Remarkably bad error message with DO array=1,2

On 02/08/2016 11:28 AM, Harald Anlauf wrote: > Hi, > > the simple patch below rejects arrays as do loop index > variable before another (confusing) error message is emitted. > Two new testcases derived from the PR, plus adaption of one > testcase that relies on the old error message. > > Whoever

[patch,libgfortran] Bug 69668 - [4.9/5/6 Regression] Error reading namelist opened with DELIM='NONE'

The attached patch reverts the guilty code. We were trying to honor delim=NONE on namelist reads which is invalid. Test cases updated. Regression tested on x86-64. OK for trunk and back port in about a week? Regards, Jerry 2016-02-09 Jerry DeLisle PR

libgo patch committed: Change gcstack_size to size_t

In PR 69511 Dominik Vogt sent in this patch to change the gcstack_size field of the G struct from uintptr to size_t. This is because the address of the field is passed to __splitstack_find, which takes an argument of type size_t*. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu.

Re: [PATCH] [ARC] Add single/double IEEE precission FPU support.

On 09/02/16 15:34, Claudiu Zissulescu wrote: Most of the cases checking only the CC user may be sufficient. However, there are cases (only one which I found), where the CC user has a different mode than of the CC setter. This is happening when running gcc.dg/pr56424.c test. Here, the C_FPU

Re: [PATCH] PR other/69554: avoid excessive source printing for widely-separated locations

[In reply to https://gcc.gnu.org/ml/gcc-patches/2016-02/msg00646.html ] Hi David, > OK for trunk in stage 4? (PR 69554 is a regression) The Fortran part of the patch is OK. I would also appreciate if the patch could go in. The chances of encountering this regression in Fortran are rather

Re: Combine simplify_set WORD_REGISTER_OPERATIONS

On Mon, Feb 01, 2016 at 08:46:42AM +1030, Alan Modra wrote: > The comment says this test is supposed to prevent "a narrower > operation than requested", but it actually only allows a larger > subreg, not one the same size. Fix that. > > Bootstrapped and regression tested powerpc64-linux. OK for

[PATCH], PR target/68404, Fix PowerPC fusion error

This bug fixes PR 68404, which created an insn for the fusion operation when accessing an array with a large constant offset that the downstream passes (regrenam in particular don't like). Because fusion in general adds so little to the performance of power8, I just eliminated the compiler from

[PATCH, i386]: Use gen_int_mode to truncate const_int operand

Hello! No need to go through all subreg processing, we already know we have const_int here. 2016-02-09 Uros Bizjak * config/i386/i386.md (insv_1): Use gen_int_mode to truncate const_int operand 1 to QImode. Bootstrapped and regression tested on x86_64-linux-gnu