Re: [PATCH][AArch64] Set default sched pressure algorithm

On Fri, Nov 3, 2017 at 12:11 AM, Wilco Dijkstra wrote: > The Arm backend sets the default sched-pressure algorithm to > SCHED_PRESSURE_MODEL. Benchmarking on AArch64 shows this > speeds up floating point performance on SPEC - eg. CactusBSSN improves > by ~16%. The gains

[RFA][PATCH][PR target/82788] Remove uses of PROBE_INTERVAL in x86 target files

The x86 backend defines a PROBE_INTERVAL which is supposed to be used by the -fstack-check= mechanisms. Some stack-clash code was using PROBE_INTERVAL rather than querying the PARAM system for the right value. If the former is larger than the latter and we allocate a large stack, then the

[RFA][PATCH] Improve initial probe for noreturn functions for x86 target

The x86 port relies on implicit probes that occur when a call instruction pushes the return address onto the stack. Those implicit calls allow the target to avoid emitting explicit stack probes. Of course we have to account for tail call optimizations which turn the call into a jump -- in

[RFA][PATCH] Fix assert on x86 target for -fstack-clash-protection

Internal testing within Red Hat tripped an assert in the x86 target. The assert wants to verify that the integer registers were saved prior to probing to deal with a special case where the probe turns into a call (which occurs on Windows IIUC). In the case of stack-clash we aren't bound by

PR82808

Hi Martin, As mentioned in PR, the issue here for propagating value of 'm' from f_c1 to foo() is that the jump function operation is FLOAT_EXPR, and the type of input param 'm' is int, so fold_unary() doesn't do the conversion to real_type. The attached patch fixes that by calling fold_convert if

[patch] tweak gcc.target/mips/msa.c options

The testcase gcc.target/mips/msa.c gives dozens of FAILs if it's tested with a GCC configured to default to -fno-common, because of patterns like /* { dg-final { scan-assembler-times "\t.comm\tv16i8_\\d+,16,16" 3 } } */ Seems like the simplest solution is to force -fcommon for this test. OK?

[RFA][PATCH] Refactor duplicated code used by various dom walkers

Several passes which perform dominator walks want to identify when block has a single incoming edge, ignoring loop backedges. I'm aware of 4 implementations of this code. 3 of the 4 are identical in function. The 4th (tree-ssa-dom.c) has an additional twist that it also ignores edges

Re: [PATCH 5/6] [ARC] Add 'uncached' attribute.

On 11/02/2017 06:30 AM, Claudiu Zissulescu wrote: From: claziss The _Uncached type qualifier can be used to bypass the cache without resorting to declaring variables as volatile. gcc/ 2017-07-12 Claudiu Zissulescu *

Re: Generalize -(-X) a little

On Thu, 2 Nov 2017, Richard Biener wrote: You can handle floats as followup but some testcases that shouldn't be optimized for the INT_MIN / unsigned case would be nice. New version, that does a bit more. Bootstrap+regtest on powerpc64le-unknown-linux-gnu. 2017-11-03 Marc Glisse

[PATCH] C/C++: more stdlib header hints (PR c/81404) (v4)

Here's an updated version of the patch. Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. OK for trunk? Changed in v4: - updated for changes of "inform_at_rich_loc" to "inform" - added #define INCLUDE_UNIQUE_PTR to known-headers.cc Changed in v3: - fixed WINT_MAX and WINT_MIN

[PATCH] c-family: add name_hint/deferred_diagnostic (v3)

Jeff: You previously had concerns about the refcounting used in v1 of this patch; this avoids that in favor of using gnu::unique_ptr. Joseph already approved the C frontend parts of v2 of this patch. Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. OK for trunk? Changed in v3: -

[PATCH] combine: Print insns we try to combine

This adds some extra debug info to the dump file for combine: print the insns that are input to try_combine. I was worried printing more will make the dump file only harder to read, but especially the info from the REG_DEAD notes is invaluable. Committing to trunk. Segher 2017-11-02 Segher

Re: Drop frequencies from basic blocks

> Can be also seen in GCC PGO: > > checking for ssize_t... ../../libdecnumber/decNumber.c: In function > ‘decDecap’: > ../../libdecnumber/decNumber.c:7640:25: error: corrupted value profile: > interval profile counter (0 out of 0) inconsistent with basic-block count > (4356) >if

Re: [PATCH, rs6000 V4] Add Power 8 support to vec_revb

Hi Carl, On Thu, Nov 02, 2017 at 12:54:57PM -0700, Carl Love wrote: > 2017-11-01 Carl Love > > * config/rs6000/rs6000-c.c (P8V_BUILTIN_VEC_REVB): Add power 8 > definitions. > (P9V_BUILTIN_VEC_REVB): Remove the power 9 instance definitions. > *

Re: [PATCH 2/2] [i386] PR82002 Part 2: Correct non-immediate offset/invalid INSN

On 10/31/2017 04:31 AM, Uros Bizjak wrote: > On Tue, Oct 31, 2017 at 3:09 AM, Daniel Santos > wrote: >> When we are realigning the stack pointer, making an ms_abi to sysv_abi >> call and alllocating 2GiB or more on the stack we end up with an invalid >> INSN due to a

PR82809: register handling in ix86_vector_duplicate_value

When adding the call to gen_vec_duplicate, I failed to notice that code further down modified the VEC_DUPLICATE in place. That isn't safe if gen_vec_duplicate returned a const_vector. Tested on x86_64-linux-gnu. OK to install? Thanks, Richard 2017-11-02 Richard Sandiford

Re: [Diagnostic Patch] don't print column zero

On 10/26/2017 12:23 PM, Nathan Sidwell wrote: On 10/26/2017 02:12 PM, Eric Gallager wrote: On 10/26/17, Nathan Sidwell wrote: On 10/26/2017 10:34 AM, David Malcolm wrote: Possibly a silly question, but is it OK to have a formatted string call in which some of the arguments

Re: [PATCH] Simplify _Node_insert_return to avoid including

Um, why are those member get's there at all (and with an index mapping that doesn't agree with the member order)? [container.insert.return] says that "It has no base classes or members other than those specified."

Re: [PATCH] RFC: add taxonomy IDs to diagnostics (CERT C, CWE, etc)

On 11/02/2017 02:51 PM, David Malcolm wrote: We currently identify our diagnostics via command-line options, and by the text of the option itself. This patch adds a way to supply metadata with a diagnostic, classifying the problem being reported, according to one of the software problem

Re: Drop frequencies from basic blocks

Apart from that I also see this GCC PGO: ../../libiberty/pex-unix.c:789:1: warning: Missing counts for called function pex_child_error.isra.1/69 } ^ during IPA pass: inline ../../libiberty/pex-unix.c: In function ‘pex_child_error.isra.1’: ../../libiberty/pex-unix.c:373:1: internal compiler

Re: Drop frequencies from basic blocks

Can be also seen in GCC PGO: checking for ssize_t... ../../libdecnumber/decNumber.c: In function ‘decDecap’: ../../libdecnumber/decNumber.c:7640:25: error: corrupted value profile: interval profile counter (0 out of 0) inconsistent with basic-block count (4356) if (cut!=DECDPUN)

[PATCH] RFC: add taxonomy IDs to diagnostics (CERT C, CWE, etc)

We currently identify our diagnostics via command-line options, and by the text of the option itself. This patch adds a way to supply metadata with a diagnostic, classifying the problem being reported, according to one of the software problem taxonomies e.g. "INT15-C" within the CERT C Secure

Re: [Diagnostic Patch] don't print column zero

On 10/26/2017 10:34 AM, David Malcolm wrote: [CCing Rainer and Mike for the gcc-dg.exp part] My Tcl skills aren't great, so hopefully someone else can review this; CCing Rainer and Mike. Ping? https://gcc.gnu.org/ml/gcc-patches/2017-10/msg01911.html nathan -- Nathan Sidwell

Re: Drop frequencies from basic blocks

On 11/02/2017 08:06 PM, Jan Hubicka wrote: Sorry, I must have used older diff file, because it is one of unfinished chnages I made today. I am attaching correct diff. Thank you. This one works for me, however I see various errors for postgres PGO: cd src/backend/replication/

[committed] Add selftest for diagnostic_get_location_text

This patch adds some selftesting of diagnostic_get_location_text, since Nathan was looking at rewriting the insides. Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. I also tested it with: LANG=de_DE.UTF-8 make selftest to avoid recurrences of PR bootstrap/71481 comment #8.

Re: [Patch, fortran] PR81447 - [7/8] gfortran fails to recognize the exact dynamic type of a polymorphic entity that was allocated in a external procedure

Dear All, Please find attached the revised version of the patch following my late realizations in yesterday's submission. Cheers Paul On 1 November 2017 at 18:22, Paul Richard Thomas wrote: > Dear All, > > This patch is adequately described by the comment in

[committed] Move selftest::test_diagnostic_context to its own header

It's useful to not rely on global_dc in selftests, so this patch moves class selftest::test_diagnostic_context from diagnostic-show-locus.c to a new header and source file. Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Committed to trunk as r254354. gcc/ChangeLog: *

Re: [C++ Patch] PR 81957 ("ICE decltype")

OK. On Thu, Nov 2, 2017 at 3:44 PM, Paolo Carlini wrote: > Hi, > > On 02/11/2017 17:54, Jason Merrill wrote: >> >> Do we really need to add tsubst_flags_t to template_parm_to_arg and >> friends? It should never produce an error. > > I see. I'm finishing testing the

Re: [PATCH, rs6000 V4] Add Power 8 support to vec_revb

GCC Maintainers: I have addressed the issues that Segher mentioned. Per our discussions, I have added new iterator VSX_XXBR to cover the needed integer and float values with the exception of V16QI. The define_expand for revb uses the new iterator to generate the needed Power 8 code. The V16QI

[patch][libgcc] FreeBSD amd64 unwind fix

Hi all, The attached patch fixes the PR 82635. I tested it on all active branches including the gcc-6 branch where we make extensive use of this MD_FALLBACK_FRAME_STATE_FOR macro. Namely in the libjava test suite. (Found no other suitable tests which do make use of this macro). No

Re: [C++ Patch] PR 81957 ("ICE decltype")

Hi, On 02/11/2017 17:54, Jason Merrill wrote: Do we really need to add tsubst_flags_t to template_parm_to_arg and friends? It should never produce an error. I see. I'm finishing testing the below, everything looks good so far. Looks ok? Thanks, Paolo. / /cp 2017-11-02

[patch committed FT32] Add FT32B support

FT32B is a new FT32 architecture type. Ft32B has a code compression scheme which uses linker relaxations. It also has a security option to prevent reads from program memory. [gcc] 2017-11-02 James Bowman * config/ft32/ft32.c

Re: [PING][patch] PR81794: have "would be stringified in traditional C" warning in libcpp/macro.c be controlled by -Wtraditional

Ping: https://gcc.gnu.org/ml/gcc-patches/2017-10/msg01834.html On 10/25/17, Eric Gallager wrote: > On Sat, Sep 30, 2017 at 8:05 PM, Eric Gallager > wrote: >> On Fri, Sep 29, 2017 at 11:15 AM, David Malcolm >> wrote: >>> On Sun,

Re: Adjust empty class parameter passing ABI (PR c++/60336)

On Thu, Nov 2, 2017 at 1:08 PM, Marek Polacek wrote: > On Thu, Nov 02, 2017 at 09:53:33AM -0400, Jason Merrill wrote: >> On Thu, Nov 2, 2017 at 8:21 AM, Richard Biener wrote: >> > On Wed, 1 Nov 2017, Marek Polacek wrote: >> > >> >> On Fri, Oct 27, 2017 at

[PATCH][AArch64] Set default sched pressure algorithm

The Arm backend sets the default sched-pressure algorithm to SCHED_PRESSURE_MODEL. Benchmarking on AArch64 shows this speeds up floating point performance on SPEC - eg. CactusBSSN improves by ~16%. The gains are mostly due to less spilling, so enable this on AArch64 by default. OK for commit?

[PR c++/82710] false positive paren warning

This patch fixes pr82710, were we erroneously warn on something like: friend class_X (::other::name (...)); the parens are needed, otherwise the '::other' is taken to be a qualified lookup inside the class_X. Unfortunately, at the point we can check, we've lost information that '::' was

Re: [RFA] Implement __VA_OPT__

On 09/17/2017 11:44 AM, Tom Tromey wrote: +@code{@w{__VA_OPT__}} is also available in GNU C and GNU C++. +{ /* c99 c++ xnum xid c11 std digr ulit rlit udlit bincst digsep trig u8chlit vaopt */ + /* GNUC89 */ { 0, 0, 1, 0, 0, 0, 1, 0, 0, 0,0, 0, 0,

[PATCH] Improve store merging to handle load+store or bitwise logicals (PR tree-optimization/78821, take 2)

On Thu, Nov 02, 2017 at 03:38:45PM +, Kyrill Tkachov wrote: > this looks great! I have a couple of comments. > * Can you please extend file comments for gimple-ssa-store-merging.c ? > Currently it mostly describes how we merge constants together. Once we start > accepting non-constant members

Re: [PATCH] New option saphira for Qualcomm server part

Ping! Siddhesh On 27 October 2017 at 18:13, Siddhesh Poyarekar wrote: > From: Siddhesh Poyarekar > > This patch adds an mcpu option for the Qualcomm saphira server part. > Tested on aarch64 and did not find any regressions resulting from this

Re: Drop frequencies from basic blocks

Hi Honza. Thanks for the huge patch. I'm willing to help you with testing, but I can't apply the patch on top of r254348: ../../gcc/profile.c: In function ‘void compute_branch_probabilities(unsigned int, unsigned int)’: ../../gcc/profile.c:794:11: error: ‘flag_guess_branch_probability’ was not

Re: Adjust empty class parameter passing ABI (PR c++/60336)

On Thu, Nov 02, 2017 at 09:53:33AM -0400, Jason Merrill wrote: > On Thu, Nov 2, 2017 at 8:21 AM, Richard Biener wrote: > > On Wed, 1 Nov 2017, Marek Polacek wrote: > > > >> On Fri, Oct 27, 2017 at 12:46:12PM +0200, Richard Biener wrote: > >> > On Fri, 27 Oct 2017, Jakub Jelinek

Re: [C++ Patch] PR 81957 ("ICE decltype")

On Tue, Oct 31, 2017 at 5:45 AM, Paolo Carlini wrote: > this ICE on valid seems rather easy to fix, one of those bugs where we > aren't propagating the tsubst_flags_t argument. In this case, we aren't > propagating from tsubst_pack_expansion to make_pack_expansion. Doing

[PATCH] RISC-V: Handle non-legitimate address in riscv_legitimize_move

From: Kito Cheng GCC may generate non-legitimate address due to we allow some load/store with non-legitimate address in pic.md. gcc/ChangeLog 2017-11-02 Kito Cheng * config/riscv/riscv.c (riscv_legitimize_move): Handle

Re: [RFA] Implement __VA_OPT__

Tom> [ __VA_OPT__ ] Tom> Here's v3. Tom> Ping. Tom> Ping #2. Ping #3. Tom

Re: [PATCH] Improve store merging to handle load+store or bitwise logicals (PR tree-optimization/78821)

On Thu, Nov 02, 2017 at 03:38:45PM +, Kyrill Tkachov wrote: > this looks great! I have a couple of comments. > * Can you please extend file comments for gimple-ssa-store-merging.c ? > Currently it mostly describes how we merge constants together. Once we start > accepting non-constant members

Re: [committed][PATCH] Trivial cleanups to new classes

On 11/02/2017 09:33 AM, Markus Trippelsdorf wrote: On 2017.11.02 at 08:55 -0600, Jeff Law wrote: As has been discussed on-list. This patch adds a virtual destructor to the new classes in tree-ssa-propagate.h per our coding conventions and what are considered best practices. It doesn't matter

Re: [PATCH] Improve store merging to handle load+store or bitwise logicals (PR tree-optimization/78821)

Hi Jakub, On 02/11/17 14:10, Jakub Jelinek wrote: Hi! The following patch improves store merging, so that it doesn't handle just constant stores into adjacent memory, but also adjacent memory copying and simple bitwise logical ops where at least one argument is a load from adjacent memory and

Re: [committed][PATCH] Trivial cleanups to new classes

On 11/02/2017 09:31 AM, Richard Biener wrote: On Thu, Nov 2, 2017 at 3:55 PM, Jeff Law wrote: As has been discussed on-list. This patch adds a virtual destructor to the new classes in tree-ssa-propagate.h per our coding conventions and what are considered best practices. It

Re: [committed][PATCH] Trivial cleanups to new classes

On 2017.11.02 at 08:55 -0600, Jeff Law wrote: > > As has been discussed on-list. This patch adds a virtual destructor to > the new classes in tree-ssa-propagate.h per our coding conventions and > what are considered best practices. It doesn't matter for any code I'm > aware of today -- it's

Re: [PATCH 3/7] GCOV: add support for lines with an unexecuted lines.

> It's possible to have a line of code that has a non-zero coverage. > However, it can contain unexecuted blocks and I hope adding a > notification can be usefull. LLVM also does that: > > -:0:Source:ternary.c > -:0:Graph:ternary.gcno > -:0:Data:ternary.gcda >

Re: [committed][PATCH] Trivial cleanups to new classes

On Thu, Nov 2, 2017 at 3:55 PM, Jeff Law wrote: > > As has been discussed on-list. This patch adds a virtual destructor to the > new classes in tree-ssa-propagate.h per our coding conventions and what are > considered best practices. It doesn't matter for any code I'm aware of

Re: Generalize -(-X) a little

On Thu, Nov 2, 2017 at 2:11 PM, Marc Glisse wrote: > On Thu, 2 Nov 2017, Richard Biener wrote: > >> On Wed, Nov 1, 2017 at 12:47 PM, Marc Glisse wrote: >>> >>> Hello, >>> >>> just a little tweak to that transformation. There is some overlap between >>>

[committed][PATCH] Trivial cleanups to new classes

As has been discussed on-list. This patch adds a virtual destructor to the new classes in tree-ssa-propagate.h per our coding conventions and what are considered best practices. It doesn't matter for any code I'm aware of today -- it's a defensive measure. This also drops the "virtual"

Re: Adjust empty class parameter passing ABI (PR c++/60336)

On Thu, Nov 02, 2017 at 01:21:17PM +0100, Richard Biener wrote: > On Wed, 1 Nov 2017, Marek Polacek wrote: > > > On Fri, Oct 27, 2017 at 12:46:12PM +0200, Richard Biener wrote: > > > On Fri, 27 Oct 2017, Jakub Jelinek wrote: > > > > > > > On Fri, Oct 27, 2017 at 12:31:46PM +0200, Richard Biener

Re: [PATCH] PR debug/81570: dwarf2cfi.c: Update cfa.offset in create_pseudo_cfg

On Tue, Oct 31, 2017 at 1:57 PM, H.J. Lu wrote: > On Tue, Oct 24, 2017 at 8:26 PM, Jason Merrill wrote: >> On Thu, Jul 27, 2017 at 3:50 PM, H.J. Lu wrote: >>> execute_dwarf2_frame is called for each funtion. But create_cie_data >>>

Re: [PATCH] RFC: Preserving locations for variable-uses and constants (PR 43486)

On Tue, Oct 31, 2017 at 5:09 PM, David Malcolm wrote: > On Tue, 2017-10-24 at 09:53 -0400, Jason Merrill wrote: >> On Fri, Oct 20, 2017 at 5:53 PM, David Malcolm >> wrote: >> > Design questions: >> > >> > * The patch introduces a new kind of tree node,

Re: [C++ Patch] PR 80955 (Macros expanded in definition of user-defined literals)

On Wed, Nov 1, 2017 at 4:45 PM, Mukesh Kapoor wrote: > On 11/1/2017 1:02 PM, Jason Merrill wrote: >> >> On Tue, Oct 31, 2017 at 12:17 PM, Mukesh Kapoor >> wrote: >>> >>> On 10/25/2017 6:44 PM, Mukesh Kapoor wrote: On 10/25/2017 4:20

Re: [PATCH] PR fortran/82796 -- common entity in equivalence in pure routine

On Thu, Nov 02, 2017 at 11:48:36AM +, Paul Richard Thomas wrote: > Hi Steve, > > I read the correspondence on clf and your earlier posting here. With > those in mind, the patch looks to be OK to commit. > > Thanks > Thanks. The c.l.f posting is addressing a different issue. This patch

Re: [C++ PATCH] overloaded operator fns [8/N]

On 11/01/2017 04:08 PM, Jason Merrill wrote: On Wed, Nov 1, 2017 at 2:29 PM, Nathan Sidwell wrote: -&& IDENTIFIER_NEWDEL_OP_P (unqualified_id))) +&& IDENTIFIER_OVL_OP_P (unqualified_id) +&& (IDENTIFIER_OVL_OP_FLAGS (unqualified_id) & OVL_OP_FLAG_ALLOC))) Why not

[PATCH] Improve store merging to handle load+store or bitwise logicals (PR tree-optimization/78821)

Hi! The following patch improves store merging, so that it doesn't handle just constant stores into adjacent memory, but also adjacent memory copying and simple bitwise logical ops where at least one argument is a load from adjacent memory and the other argument as well or a constant. The loads

Re: [PATCH] fix fdump-lang-raw ICE

On 11/01/2017 03:40 PM, Jakub Jelinek wrote: On Wed, Nov 01, 2017 at 03:24:56PM -0400, Nathan Sidwell wrote: Thomas Koenig noticed -fdump-lang-raw gives an immediate ICE. I broke it with the DECL_ASSEMBLER_NAME changes last month. Fixed thusly, applied as obvious. Shouldn't there be a

Enable inc/dec generation on Haswell+

Hi, core2 used to have quite large penalty for partial flag registers store done by INCDEC. This was improved on Sandybridge where extra merging uop is produced and more at Haswell where there is no extra uop unless there is instruction accessing both. For this reason we can use inc/dec again on

Re: Adjust empty class parameter passing ABI (PR c++/60336)

On Thu, Nov 2, 2017 at 8:21 AM, Richard Biener wrote: > On Wed, 1 Nov 2017, Marek Polacek wrote: > >> On Fri, Oct 27, 2017 at 12:46:12PM +0200, Richard Biener wrote: >> > On Fri, 27 Oct 2017, Jakub Jelinek wrote: >> > >> > > On Fri, Oct 27, 2017 at 12:31:46PM +0200, Richard

Re: [PATCH] Fix UBSAN errors in dse.c (PR rtl-optimization/82044).

PING^1 On 10/19/2017 01:36 PM, Martin Liška wrote: > On 09/20/2017 10:15 AM, Jakub Jelinek wrote: >> On Wed, Sep 20, 2017 at 09:50:32AM +0200, Martin Liška wrote: >>> Hello. >>> >>> Following patch handles UBSAN (overflow) in dce.c. >> >> dse.c ;) >> >>> --- a/gcc/dse.c >>> +++ b/gcc/dse.c >>> @@

Re: [PATCH] Add offset_int to guard HOST_WIDE_INT overflow (PR tree-optimization/82042).

On 10/19/2017 01:58 PM, Richard Biener wrote: > In the end I don't think we want to slow down code just for the sake of > UBSAN. IMHO for code invoking undefined behavior (object too large) > it's reasonable for the compiler to invoke undefined behavior Agree that it's very artificial

[PATCH] Fix PR82795

Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2017-11-02 Richard Biener PR tree-optimization/82795 * tree-if-conv.c (predicate_mem_writes): Remove bogus assert. * gcc.target/i386/pr82795.c: New testcase. Index:

Re: Generalize -(-X) a little

On Thu, 2 Nov 2017, Richard Biener wrote: On Wed, Nov 1, 2017 at 12:47 PM, Marc Glisse wrote: Hello, just a little tweak to that transformation. There is some overlap between the 2 versions, but it seemed easier to handle the NOP case (including the case without convert

Re: [PATCH 6/9] [LVU] Allow final_start_function to skip initial insns

On Wed, Nov 1, 2017 at 7:18 PM, Alexandre Oliva wrote: > On Oct 31, 2017, Jeff Law wrote: > >> On 09/30/2017 03:08 AM, Alexandre Oliva wrote: >>> This API change will enable final_start_function() to "consume" >>> initial insns, and choose the first insn to be

Re: Generalize -(-X) a little

On Wed, Nov 1, 2017 at 12:47 PM, Marc Glisse wrote: > Hello, > > just a little tweak to that transformation. There is some overlap between > the 2 versions, but it seemed easier to handle the NOP case (including the > case without convert and the vector case) separately from

[PATCH 6/6] [ARC] Add 'aux' variable attribute.

From: claziss The 'aux' variable attribute is used to directly access the auxiliary register space from C. gcc/ 2017-07-25 Claudiu Zissulescu * config/arc/arc.c (arc_handle_aux_attribute): New function. (arc_attribute_table): Add

[PATCH 1/6] [ARC] Add JLI support.

The ARCv2 ISA provides the JLI instruction, which is two-byte instructions that can be used to reduce code size in an application. To make use of it, we provide two new function attributes 'jli_always' and 'jli_fixed' which will force the compiler to call the indicated function using a jli_s

[PATCH 2/6] [ARC] Add SJLI support.

gcc/ 2017-02-20 Claudiu Zissulescu * config/arc/arc-protos.h: Add arc_is_secure_call_p proto. * config/arc/arc.c (arc_handle_secure_attribute): New function. (arc_attribute_table): Add 'secure_call' attribute. (arc_print_operand): Print

[PATCH 5/6] [ARC] Add 'uncached' attribute.

From: claziss The _Uncached type qualifier can be used to bypass the cache without resorting to declaring variables as volatile. gcc/ 2017-07-12 Claudiu Zissulescu * config/arc/arc-protos.h (arc_is_uncached_mem_p): Function proto.

[PATCH 3/6] [ARC] Add support for "register file 16" reduced register set

gcc/ 2017-03-20 Claudiu Zissulescu * config/arc/arc-arches.def: Option mrf16 valid for all architectures. * config/arc/arc-c.def (__ARC_RF16__): New predefined macro. * config/arc/arc-cpus.def (em_mini): New cpu with rf16 on. *

[PATCH 4/6] [ARC] Rework delegitimate_address hook

From: claziss Delegitimize address is used to undo the obfuscating effect of PIC addresses, returning the address in a way which is understood by the compiler. gcc/ 2017-04-25 Claudiu Zissulescu * config/arc/arc.c

[PATCH 0/6] [ARC] New baremetal features and fixes

From: claziss Hi, This set of patches are adding support for: - JLI/SJLI instructions; - reduced register file 16 specific for particular ARC configurations; - 'uncached' attribute, used to toggle .di flag on variable basis; - 'aux' attribute, used to

Re: Adjust empty class parameter passing ABI (PR c++/60336)

On Wed, 1 Nov 2017, Marek Polacek wrote: > On Fri, Oct 27, 2017 at 12:46:12PM +0200, Richard Biener wrote: > > On Fri, 27 Oct 2017, Jakub Jelinek wrote: > > > > > On Fri, Oct 27, 2017 at 12:31:46PM +0200, Richard Biener wrote: > > > > I fear it doesn't work at all with LTO (you'll always get the

[PATCH] [ARC] Reimplement exception handling support.

This is patch which solves the ARC issues with exception handling support. Ok to apply? Claudiu 2016-06-09 Claudiu Zissulescu Andrew Burgess * config/arc/arc-protos.h (arc_compute_frame_size): Delete

RE: [patch][x86] GFNI enabling [2/4]

The documentation is right, I was wrong not adding SSE/AVX flags in these builtin declaratuin. > The exceptions are > MMX, AVX512VL and 64BIT is also special. > So, shall GFNI be added to that set? Turns out only GFNI and VAES(haven't sent those yet, they are from the same Icelake pdf) are

Re: [PATCH][AArch64] Define MALLOC_ABI_ALIGNMENT

Richard Earnshaw wrote: > On 01/11/17 17:40, James Greenhalgh wrote: >> As far as I understand it, because we have 128-bit types, a malloc of >> anything greater than 16 bytes would require 16-byte alignment. So, assuming >> this macro isn't required to desribe possibly unaligned smaller

Re: [PATCH] PR fortran/82796 -- common entity in equivalence in pure routine

Hi Steve, I read the correspondence on clf and your earlier posting here. With those in mind, the patch looks to be OK to commit. Thanks Paul On 2 November 2017 at 01:09, Steve Kargl wrote: > The attached patch fixes a regression where gfortran was > issuing

Re: [PATCH] enhance -Warray-bounds to detect out-of-bounds offsets (PR 82455)

On Mon, 30 Oct 2017, Martin Sebor wrote: > On 10/30/2017 02:56 PM, Richard Biener wrote: > > On October 30, 2017 9:13:04 PM GMT+01:00, Martin Sebor > > wrote: > > > On 10/30/2017 01:53 PM, Richard Biener wrote: > > > > On October 30, 2017 4:19:25 PM GMT+01:00, Martin Sebor > >

Re: [PATCH] enhance -Warray-bounds to detect out-of-bounds offsets (PR 82455)

On Mon, 30 Oct 2017, Jeff Law wrote: > On 10/30/2017 05:29 PM, Martin Sebor wrote: > > On 10/30/2017 03:48 PM, Jeff Law wrote: > >> On 10/30/2017 09:19 AM, Martin Sebor wrote: > >>> On 10/30/2017 05:45 AM, Richard Biener wrote: > On Sun, 29 Oct 2017, Martin Sebor wrote: > > > In my

Re: [PATCH][AArch64] Define MALLOC_ABI_ALIGNMENT

On 01/11/17 17:40, James Greenhalgh wrote: > On Tue, Oct 31, 2017 at 05:07:54PM +, Wilco Dijkstra wrote: >> The AArch64 backend currently doesn't set MALLOC_ABI_ALIGNMENT, so >> add this to enable alignment optimizations on malloc pointers. >> >> OK for commit? > > As far as I understand it,

Re: [PATCH PR79868 ][aarch64] Fix error calls in aarch64 code so they can be translated (version 2)

On 31/10/17 16:53, Steve Ellcey wrote: > On Tue, 2017-10-31 at 09:57 +, Richard Earnshaw (lists) wrote: >>   >> This is looking better... >> >> I may have missed some discussion on this topic, but what's the >> reasoning behind changing the quoting around the 'str' parameter >> value in >> >>

[build] Cleanup Solaris linker version checks

There's some potential to cleanup Solaris linker version checks: * gcc_AC_INITFINI_ARRAY in acinclude.m4 is unused, but still serves as documentation for the various variants of ld version strings. This is now moved to configure.ac. * Solaris 11.4 has (or shortly will have) some changes to

Re: [doc] Remove Tru64 UNIX and IRIX references in install.texi

Hi Sandra, > On 10/27/2017 05:48 AM, Rainer Orth wrote: >> I happened to notice that install.texi still contains references to the >> Tru64 UNIX and IRIX ports I've removed in GCC 4.8. I believe it's time >> now to get rid of those completely. >> >> Tested with make doc/gccinstall.info and

Re: [patch, Fortran] PR 55806 - Inefficient ANY with array constructors

On Mon, Jan 14, 2013 at 10:51:25PM +0100, Thomas Koenig wrote: > Am 14.01.2013 14:29, schrieb Mikael Morin: > > Le 13/01/2013 23:14, Thomas Koenig a écrit : > > > > OK for trunk? > > > > > OK with the changes suggested above. Thanks. > > Committed as rev. 195179 with your changes.

Re: [doc] Remove Tru64 UNIX and IRIX references in install.texi

Hi Jeff, > On 10/27/2017 05:48 AM, Rainer Orth wrote: >> I happened to notice that install.texi still contains references to the >> Tru64 UNIX and IRIX ports I've removed in GCC 4.8. I believe it's time >> now to get rid of those completely. >> >> Tested with make doc/gccinstall.info and

RE: [PATCH] [ARC][ZOL] Account for empty body loops

> > gcc/ > > 2017-09-01 Claudiu Zissulescu > > > > * config/arc/arc.c (hwloop_optimize): Account for empty > > body loops. > > Looks good to me. > > Thanks, > Andrew > > Pushed. Thank you for your review, Claudiu

[PATCH, i386] Enable option -mprefer-avx256 as default for Intel Skylake configuration

Hi, This patch makes "prefer-avx256" option as default tuning for "skylake-avx512". This is due to better performance of 256-bit code for some of the cases. In case of Skylake Server the Optimization Manual has following "Since port 0 and port 1 are 256-bits wide, Intel AVX-512 operations that

Re: [12/nn] [AArch64] Add const_offset field to aarch64_address_info

On Fri, Oct 27, 2017 at 02:31:35PM +0100, Richard Sandiford wrote: > This patch records the integer value of the address offset in > aarch64_address_info, so that it doesn't need to be re-extracted > from the rtx. The SVE port will make more use of this. The patch > also uses poly_int64 routines

Re: [09/nn] [AArch64] Pass number of units to aarch64_expand_vec_perm(_const)

On Fri, Oct 27, 2017 at 02:29:30PM +0100, Richard Sandiford wrote: > This patch passes the number of units to aarch64_expand_vec_perm > and aarch64_expand_vec_perm_const, which avoids a to_constant () > once GET_MODE_NUNITS is variable. OK. Reviewed-by: James Greenhalgh

Re: [08/nn] [AArch64] Pass number of units to aarch64_simd_vect_par_cnst_half

On Fri, Oct 27, 2017 at 02:28:57PM +0100, Richard Sandiford wrote: > This patch passes the number of units to aarch64_simd_vect_par_cnst_half, > which avoids a to_constant () once GET_MODE_NUNITS is variable. OK. Reviewed-by: James GReenhalgh Thanks, James >

Re: [07/nn] [AArch64] Pass number of units to aarch64_reverse_mask

On Fri, Oct 27, 2017 at 02:28:27PM +0100, Richard Sandiford wrote: > This patch passes the number of units to aarch64_reverse_mask, > which avoids a to_constant () once GET_MODE_NUNITS is variable. OK Reviewed-by: James Greenhalgh Thanks, James > > > 2017-10-26

Re: [06/nn] [AArch64] Add an endian_lane_rtx helper routine

On Fri, Oct 27, 2017 at 02:27:50PM +0100, Richard Sandiford wrote: > Later patches turn the number of vector units into a poly_int. > We deliberately don't support applying GEN_INT to those (except > in target code that doesn't disguish between poly_ints and normal > constants); gen_int_mode needs

[testsuite, committed] Fix scan-assembler patterns in i386/naked-{1,2}.c

[ was: Re: [PATCH, i386]: Implement attribute ((naked)) ] On 07/30/2017 10:14 PM, Uros Bizjak wrote: Index: testsuite/gcc.target/i386/naked-1.c +/* { dg-final { scan-assembler "ud2" } } */ +/* { dg-final { scan-assembler-not "ret" } } */ Index: testsuite/gcc.target/i386/naked-2.c +/* {

Re: [01/nn] [AArch64] Generate permute patterns using rtx builders

James Greenhalgh writes: > On Fri, Oct 27, 2017 at 02:22:39PM +0100, Richard Sandiford wrote: >> This patch replaces switch statements that call specific generator >> functions with code that constructs the rtl pattern directly. >> This seemed to scale better to SVE and

[testsuite, committed] Fix scan pattern in gfortran.dg/implied_do_io_1.f90

[ was: Re: [Patch, fortran] PR35339 Optimize implied do loops in io statements ] On 06/03/2017 03:48 PM, Nicolas Koenig wrote: ! { dg-final { scan-tree-dump-times "while" 7 "original" } } Hi, I build and tested gcc in a directory with "while" in the path. That made this scan fail (with 25