Extend usage of C++11 direct init in __debug::vector

This patch extend usage of C++11 direct initialization in __debug::vector and makes some calls to operator - more consistent. Note that I also rewrote following expression in erase method: -      return begin() + (__first.base() - cbegin().base()); +      return { _Base::begin() +

Re: [PATCH 02/14] Add D frontend (GDC) implementation.

On 14 October 2018 at 17:29, Richard Sandiford wrote: > [Sorry if this turns out to do be a dup] > > Iain Buclaw writes: >> On 18 September 2018 at 02:33, Iain Buclaw wrote: >>> This patch adds the D front-end implementation, the only part of the >>> compiler that interacts with GCC directly,

Re: Relocation (= move+destroy)

On Sat, 13 Oct 2018, Marc Glisse wrote: + template +struct __is_trivially_relocatable +: is_trivially_move_constructible<_Tp> { }; Oups, this part is wrong, sorry, it is supposed to be "is_trivial" instead of "is_trivially_move_constructible", to match what is done elsewhere in

Re: [PATCH] i386: Add register source to movddup

On 10/14/18, Alexander Monakov wrote: > On Sun, 14 Oct 2018, Uros Bizjak wrote: >> > +/* { dg-final { scan-assembler-times "punpcklqdq\[ \\t\]+%xmm\[0-9\],\[ >> > \\t\]+%xmm\[0-9\]" 1 } } */ >> >> You need to scan for %xmm\[0-9\]+, otherwise xmm10 is already out of >> luck. > > I think it would

Re: [PATCH] i386: Add register source to movddup

On Sun, 14 Oct 2018, Uros Bizjak wrote: > > +/* { dg-final { scan-assembler-times "punpcklqdq\[ \\t\]+%xmm\[0-9\],\[ > > \\t\]+%xmm\[0-9\]" 1 } } */ > > You need to scan for %xmm\[0-9\]+, otherwise xmm10 is already out of luck. I think it would be preferable to scan for 'punpcklqdq xmm0, xmm0'

[PATCH] asm non-code template parts (alternative to asm inline)

Hello, This is an alternative proposal to the "asm inline" feature. Kernel developers have reported suboptimal optimization where use of asm statements such as asm("ud2\n" ".pushsection foo\n" ... ".popsection\n" : : ...) impacts inlining decisions badly, since GCC assumes

Re: [PATCH] i386: Also disable AVX512IFMA/AVX5124FMAPS/AVX5124VNNIW

On Sat, Oct 13, 2018 at 11:54 PM H.J. Lu wrote: > > Also disable AVX512IFMA, AVX5124FMAPS and AVX5124VNNIW when disabling > AVX512F. > > gcc/ > > PR target/87572 > * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512F_UNSET): > Add OPTION_MASK_ISA_AVX512IFMA_UNSET, >

Re: [PATCH] i386: Add register source to movddup

On Sat, Oct 13, 2018 at 11:54 PM H.J. Lu wrote: > > Add register source to movddup so that IRA will allow register source > for *vec_dupv2di when SSE3 is enabled. > > gcc/ > > PR target/87599 > * config/i386/sse.md (*vec_dupv2di): Add register source to > movddup. > >

Re: [PATCH/RFC] Add "User Experience Guidelines" to gccint.texi

On 10/12/2018 09:43 AM, David Malcolm wrote: Here's a proposed "User Experience Guidelines" section for our internals manual It's a mixture of proposed policy, together with notes on how to implement the recommendations. Thoughts? To improve consistency among diagnostic messages it's

Re: [PATCH 02/14] Add D frontend (GDC) implementation.

[Sorry if this turns out to do be a dup] Iain Buclaw writes: > On 18 September 2018 at 02:33, Iain Buclaw wrote: >> This patch adds the D front-end implementation, the only part of the >> compiler that interacts with GCC directly, and being the parts that I >> maintain, is something that I can

Re: [PATCH/RFC] Add "User Experience Guidelines" to gccint.texi

On 10/12/18, David Malcolm wrote: > Here's a proposed "User Experience Guidelines" section for our > internals manual > > It's a mixture of proposed policy, together with notes on how to > implement the recommendations. > > Thoughts? I have no comments on the actual contents of the patch, just

[PATCH PR87022]Check all bits in dist-vector rather than the fisrt in loop distribution

Hi, This patch fixes PR87022. The root cause is the original code checks the first bit in dist vector for zero and we still do that after enabling loop nest distribution. For the test case, the first bit is for outer loop while the dependence happens in the inner loop, as a result, the

Update my email address

Hi, The company (Alibaba) finished signing copyright assignment with FSF, so this patch updates my email address as attached. Thanks, bin email-address.txt Description: Binary data

[Patch, fortran] PR87566 - ICE with class(*) and select

Tobias started this patch and I finished it in answering a question that he had about a problem with the gimplifier. Along the way, I tried the associate version of the select type test case and found that it failed in a different way. The chunk in resolve_assoc_var fixes that. Bootstrapped and

[PATCH, moxie] Adjust divide-by-zero testcase for moxie

This patch adjusts one of the c-torture tests to account for the possible lack of divide-by-zero exceptions on certain moxie targets. Committed. gcc/testsuite/ 2018-10-14 Anthony Green * gcc.c-torture/execute/20101011-1.c: Adjust for moxie. Index:

Re: [PATCH] i386: Add register source to movddup

On Sun, 14 Oct 2018, Alexander Monakov wrote: > > I doubt this is a correct fix, and I think the issue merits more > investigation. > Please see comment #5 in the PR. Sorry, it seems I was misunderstanding how constraints interact with cost calculation. I withdraw my objection to the patch.