On 10/15/2018 12:07 PM, Jonathan Wakely wrote:
On 09/10/18 07:11 +0200, François Dumont wrote:
Here is the communication for my yesterday's patch which I thought
svn had failed to commit (I had to interrupt it).
Similarly to what I've done for associative containers here is a
cleanup of the
From 55047aa22e40de2637fbab4b5e246dfc4ca191f8 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Mon, 3 Sep 2018 19:45:15 +0800
Subject: [PATCH 5/6] Add support for Loongson 3A2000/3A3000 proccessor.
gcc/
* config/mips/gs464e.md: New.
* config/mips/mips-cpus.def: Define gs464e.
*
From 0df9c46bea628086ca2c4b5db24c28cec912d319 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Mon, 3 Sep 2018 20:01:54 +0800
Subject: [PATCH 6/6] Add support for Loongson 2K1000 proccessor.
gcc/
* config/mips/gs264e.md: New.
* config/mips/mips-cpus.def: Define gs264e.
*
From 14eabf990f187631cacd47e02342941ddb1b04a0 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Fri, 31 Aug 2018 11:55:48 +0800
Subject: [PATCH 3/6] Add support for Loongson EXT2 istructions.
gcc/
* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define
__mips_loongson_ext2,
From ce950df0f918eb02d15c4287d21e3aecb43bf351 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Fri, 31 Aug 2018 14:08:01 +0800
Subject: [PATCH 4/6] Add support for Loongson 3A1000 proccessor.
gcc/
* config/mips/loongson3a.md: Rename to ...
* config/mips/gs464.md: ... here.
*
From e9d36eb4d4a841486ac82037497a2671481f8a27 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Sun, 14 Oct 2018 11:11:00 +0800
Subject: [PATCH 1/6] Add support for loongson mmi instructions.
gcc/
* config.gcc (extra_headers): Add loongson-mmiintrin.h.
* config/mips/loongson.md:
From 2e053c832497892c6b8b1b685aaf871d8fc4da76 Mon Sep 17 00:00:00 2001
From: Chenghua Xu
Date: Fri, 31 Aug 2018 11:52:33 +0800
Subject: [PATCH 2/6] Add support for Loongson EXT istructions.
gcc/
* config/mips/mips.c (mips_option_override): Default enable
Loongson EXT on Loongson 3a target.
*
Hi:
The original version of patches were here:
https://gcc.gnu.org/ml/gcc-patches/2018-09/msg00099.html
This is a update version. please review, thanks.
This series patches reorganize the Loongson -march=xxx and Loongson
extensions instructions set. For long time, the Loongson extensions
On 10/11/18 10:40 PM, Jeff Law wrote:
> On 10/11/18 1:23 PM, Peter Bergner wrote:
>> * ira-lives (non_conflicting_reg_copy_p): Disable for non LRA targets.
> So this helped the alpha & hppa and sh4.
>
> I'm still seeing failures on the aarch64, s390x. No surprise on these
> since they use
I sent mail to James about a month ago, but never heard back So...
This patch works around a problem in the ft32 port that shows up when
building newlib.
The assembler was complaining about a line like this:
ldi.b $r1,_ctype_-0x80+1($r0)
That's certainly an odd looking
This patch adds a minimum width to the left margin used for printing
line numbers. I set the default to 6. Hence rather than:
some-filename:9:1: some message
9 | some source text
| ^~~~
some-filename:10:1: another message
10 | more source text
| ^~~~
we now print:
"error_at_rich_loc" went away in r254280 (in favor of overloading
"error_at"), but there was a stray reference in a comment.
Remove it.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Committed to trunk as r265177.
gcc/ChangeLog:
* gcc-rich-location.h
On 10/15/2018 12:10 PM, Jonathan Wakely wrote:
On 15/10/18 07:23 +0200, François Dumont wrote:
This patch extend usage of C++11 direct initialization in
__debug::vector and makes some calls to operator - more consistent.
Note that I also rewrote following expression in erase method:
-
I started considering PR libstdc++/68303.
First thing was to write a dedicated performance test case, it is the
unordered_small_size.cc I'd like to add with this patch.
The first runs show a major difference between tr1 and std
implementations, tr1 being much better:
On 10/15/2018 11:36 AM, Jonathan Wakely wrote:
On 12/10/18 18:25 +0200, François Dumont wrote:
Here is the patch for _Bit_iterator and _Bit_const_iterator operators.
I noticed that _Bit_reference == and < operators could be made inline
friend too. Do you want me to include this change in the
On Mon, Oct 15, 2018 at 10:45:08PM +0300, Alexander Monakov wrote:
> On Mon, 15 Oct 2018, Segher Boessenkool wrote:
> > On Sun, Oct 14, 2018 at 11:07:20PM +0300, Alexander Monakov wrote:
> > > For Basic asms, no similar mechanism is necessary since they are
> > > antithetical
> > > to efficiency
On 10/15/2018 11:58 AM, Jonathan Wakely wrote:
On 11/10/18 22:46 +0200, François Dumont wrote:
This patch makes extensive use of C++11 direct init in
__debug::forward_list.
Doing so I also try to detect useless creation of safe iterators in
debug implementation. In __debug::forward_list
On Mon, 15 Oct 2018, Segher Boessenkool wrote:
> On Sun, Oct 14, 2018 at 11:07:20PM +0300, Alexander Monakov wrote:
> > For Basic asms, no similar mechanism is necessary since they are
> > antithetical
> > to efficiency in the first place.
>
> I missed this part.
>
> asm("bla");
>
> means
as the subject states, FORM TEAM was only using the resulting tree
expression, ignoring code which was generated before (or afterward).
I am not sure how to best convert it to a test-suite test case. For
form team (team(this_image()), my_team2)
the old dump was:
integer(kind=4)
Right commit revision, wrong attached file (original patch, not the
follow-up one).
Now hopefully the correct one.
Tobias
Am 15.10.18 um 21:02 schrieb Tobias Burnus:
Fixed with commit Rev. 265175 as attached.
Cheers
Tobias
Dominique d'Humières wrote:
Le 14 oct. 2018 à 00:43, Tobias
Fixed with commit Rev. 265175 as attached.
Cheers
Tobias
Dominique d'Humières wrote:
Le 14 oct. 2018 à 00:43, Tobias Burnus a écrit :
Dominique d'Humières wrote:
UNRESOLVED: gfortran.dg/inline_matmul_24.f90 -O0 scan-tree-dump-times optimized
"gamma5[__var_1_do * 4 +
On 15/10/18 14:55 +0100, Jonathan Wakely wrote:
Glibc changed the it_IT locales to use thousands separators,
invalidating this test. Use nl_NL instead, as Dutch only uses grouping
for money not numbers.
* testsuite/22_locale/numpunct/members/char/3.cc: Adjust test to
account for
On Sun, 2018-10-14 at 11:01 -0600, Martin Sebor wrote:
> On 10/12/2018 09:43 AM, David Malcolm wrote:
> > Here's a proposed "User Experience Guidelines" section for our
> > internals manual
> >
> > It's a mixture of proposed policy, together with notes on how to
> > implement the recommendations.
Hi Richard,
as Joseph pointed out, there are some related discussions
on the WG14 reflector. How a about moving the discussion
there?
I find your approach very interesting and that it already
comes with an implementation is of course very useful
But I don't really understand the reasons why
On Sun, Oct 14, 2018 at 11:07:20PM +0300, Alexander Monakov wrote:
> For Basic asms, no similar mechanism is necessary since they are antithetical
> to efficiency in the first place.
I missed this part.
asm("bla");
means almost the same as
asm("bla" : );
and there is nothing in there that
On Sun, Oct 14, 2018 at 11:07:20PM +0300, Alexander Monakov wrote:
> impacts inlining decisions badly, since GCC assumes cost of the asm to be
> high, even though it emits just one instruction to the text section. I'd
> like to point out that branch range optimization is also negatively affected.
Hi,
here we ICE when, at the end of check_tag_decl we pass a DECLTYPE_TYPE
to warn_misplaced_attr_for_class_type. I think the right fix is
rejecting earlier a decltype with no declarator as a declaration that
doesn't declare anything (note: all the compilers I have at hand agree).
Tested
Committed as revision 265171.
Thanks to you, Dominique and, of course, Tobias.
Paul
On Mon, 15 Oct 2018 at 10:15, Thomas Koenig wrote:
>
> Hi Paul,
>
> > Bootstrapped and regtested on FC28/x86_64 - OK for trunk?
>
> Looks good. Thanks!
>
> Regards
>
> Thomas
--
"If you can't
On Mon, 15 Oct 2018 at 16:19, David Malcolm wrote:
>
> On Tue, 2018-09-18 at 02:33 +0200, Iain Buclaw wrote:
> > This patch adds the D front-end implementation, the only part of the
> > compiler that interacts with GCC directly, and being the parts that I
> > maintain, is something that I can
On Mon, Oct 15, 2018 at 05:57:18PM +0200, Uros Bizjak wrote:
> On Mon, Oct 15, 2018 at 5:49 PM Uros Bizjak wrote:
>
> > > Plus, I wonder if we shouldn't make it harder to run into these issues, by
> > > changing
> > > Target Report Mask(ISA_AVX5124FMAPS) Var(ix86_isa_flags2) Save
> > > etc. to
>
On Mon, Oct 15, 2018 at 5:49 PM Uros Bizjak wrote:
> > Plus, I wonder if we shouldn't make it harder to run into these issues, by
> > changing
> > Target Report Mask(ISA_AVX5124FMAPS) Var(ix86_isa_flags2) Save
> > etc. to
> > Target Report Mask(ISA2_AVX5124FMAPS) Var(ix86_isa_flags2) Save
> > so
On Mon, Oct 15, 2018 at 4:50 PM Jakub Jelinek wrote:
>
> On Mon, Oct 15, 2018 at 04:22:04PM +0200, Richard Biener wrote:
> > On Sun, Oct 14, 2018 at 9:29 PM Uros Bizjak wrote:
> > >
> > > On Sat, Oct 13, 2018 at 11:54 PM H.J. Lu wrote:
> > > >
> > > > Also disable AVX512IFMA, AVX5124FMAPS and
Hi Martin,
On 10/15/18 6:20 PM, Martin Sebor wrote:
On 10/15/2018 01:55 AM, Nikolai Merinov wrote:
Hi Martin,
On 10/12/18 9:58 PM, Martin Sebor wrote:
On 10/12/2018 04:14 AM, Nikolai Merinov wrote:
Hello,
In https://gcc.gnu.org/ml/gcc-patches/2018-09/msg01795.html mail I
suggested patch to
Hi Rasmus,
> On 8 Oct 2018, at 15:03, Rasmus Villemoes wrote:
>
> fixincludes/
>
> * inclhack.def (AAB_vxworks_regs_vxtypes): Add unconditional
> include of vxCpu.h, guard include of vxTypesOld.h by
> !_ASMLANGUAGE.
> * fixincl.x: Regenerate.
Good for me, thanks.
Ping?
Best regards,
Thomas
On Fri, 5 Oct 2018 at 17:50, Thomas Preudhomme
wrote:
>
> Hi Ramana and Kyrill,
>
> I've reworked the patch to add some documentation of the option
> conflict and reworked the -mword-relocation logic slightly to set the
> variable explicitely in PIC mode rather than
On Mon, 15 Oct 2018, Richard Sandiford wrote:
> The patches therefore add a new "__sizeless_struct" keyword to denote
> structures that are sizeless rather than sized. Unlike normal
> structures, these structures can have members of sizeless type in
> addition to members of sized type. On the
On Mon, Oct 15, 2018 at 04:22:04PM +0200, Richard Biener wrote:
> On Sun, Oct 14, 2018 at 9:29 PM Uros Bizjak wrote:
> >
> > On Sat, Oct 13, 2018 at 11:54 PM H.J. Lu wrote:
> > >
> > > Also disable AVX512IFMA, AVX5124FMAPS and AVX5124VNNIW when disabling
> > > AVX512F.
> > >
> > > gcc/
> > >
> >
This patch adds support for sizeless types to C, along the lines
described in the covering RFC. The patch is actually a squash
of 26 patches that I've attached as a tarball, with each patch
building up the support piece-by-piece. The individual patches
say which part of the standard they relate
This patch adds a bit to tree_type_common (which still has plenty
of bits spare) to indicate whether the type has a measurable size
at the language level once fully-defined.
2018-10-15 Richard Sandiford
gcc/
* tree-core.h (tree_type_common::sizeless): New bitfield.
This patch makes a couple of c-family macros use COMPLETE_TYPE_P instead
of TYPE_SIZE, so that the definitions more clearly correspond to the
names of the macros.
2018-10-15 Richard Sandiford
gcc/c-family/
* c-common.h (C_TYPE_OBJECT_P, C_TYPE_INCOMPLETE_P): Test
After previous patches there are no more uses of COMPLETE_TYPE_P outside
the frontends. This patch moves the definition to c-common.h.
2018-10-15 Richard Sandiford
gcc/
* tree.h (COMPLETE_TYPE_P): Move to c-common.h.
gcc/c-family/
* c-common.h (COMPLETE_TYPE_P): Moved from
complete_or_array_type_p was defined in tree.h but unused outside
the frontends. This patch moves it to c-common.h.
2018-10-15 Richard Sandiford
gcc/
* tree.h (complete_or_array_type_p): Move to c-common.h.
gcc/c-family/
* c-common.h (complete_or_array_type_p): Moved from
There was only one use of COMPLETE_OR_UNBOUND_ARRAY_TYPE_P outside the
frontends, in expr.c. This patch expands the macro there and moves the
macro's definition to c-common.h.
It feels a bit odd that we still have decls with no layout at
this late stage, but that's a separate issue...
There was only one use of this macro outside the frontends, in dbxout.c.
This patch expands that use and moves the macro's definition to c-common.h.
There's no expectation that dbx will support sizeless types,
so keeping the current definition should be fine.
2018-10-15 Richard Sandiford
This patch adds a DEFINITE_TYPE_P macro for testing whether a
type has been fully-defined. The definition is the same as the
current definition of COMPLETE_TYPE_P, but later patches redefine
COMPLETE_TYPE_P and make it local to the C and C++ frontends.
The name "definite type" comes from the SVE
Some tests for COMPLETE_TYPE_P are just protecting against a null
TYPE_SIZE or TYPE_SIZE_UNIT. Rather than replace them with a new
macro, it seemed clearer to write out the underlying test.
2018-10-15 Richard Sandiford
gcc/
* calls.c (initialize_argument_information): Replace
The C standard says:
At various points within a translation unit an object type may be
"incomplete" (lacking sufficient information to determine the size of
objects of that type) or "complete" (having sufficient information).
For AArch64 SVE, we'd like to split this into two
ping
On 27/09/18 14:43, Matthew Malcomson wrote:
[PATCH][GCC][AARCH64] Introduce aarch64 atomic_{load,store}ti patterns
In Armv8.4-a these patterns use the LDP/STP instructions that are guaranteed to
be single-copy atomic, ensure correct memory ordering semantics by using
the DMB instruction.
On Fri, 12 Oct 2018 at 13:45, Richard Earnshaw (lists)
wrote:
>
> On 11/10/18 14:34, Christophe Lyon wrote:
> > 2018-XX-XX Christophe Lyon
> > Mickaël Guêné
> >
> > gcc/
> > * config/arm/arm.c (arm_compute_save_reg0_reg12_mask): Handle
> > FDPIC.
> >
On Sun, Oct 14, 2018 at 9:29 PM Uros Bizjak wrote:
>
> On Sat, Oct 13, 2018 at 11:54 PM H.J. Lu wrote:
> >
> > Also disable AVX512IFMA, AVX5124FMAPS and AVX5124VNNIW when disabling
> > AVX512F.
> >
> > gcc/
> >
> > PR target/87572
> > * common/config/i386/i386-common.c
On Tue, 2018-09-18 at 02:33 +0200, Iain Buclaw wrote:
> This patch adds the D front-end implementation, the only part of the
> compiler that interacts with GCC directly, and being the parts that I
> maintain, is something that I can talk about more directly.
>
> For the actual code generation
On Fri, 12 Oct 2018 at 13:37, Richard Earnshaw (lists) <
richard.earns...@arm.com> wrote:
> On 11/10/18 14:34, Christophe Lyon wrote:
> > The main difference with existing support is that function addresses
> > are function descriptor addresses instead. This means that all code
> > dealing with
On Mon, 15 Oct 2018, Robin Dapp wrote:
> * haifa-sched.c (priority): Add force_recompute parameter.
> (apply_replacement):
> Call priority () with force_recompute = true.
> (restore_pattern): Likewise.
A C++ style nit/question: instead of adding a new overload
priority
> > I think only double quote, backslash, backtick remain unclaimed. And of
> > course
> > ASCII \0 through \040 and \177 ;)
>
> I see. Apart from using some of the traditional begin-end sequences we
> could use %; or similar on each line to "comment" it?
I guess in theory we could define
Glibc changed the it_IT locales to use thousands separators,
invalidating this test. Use nl_NL instead, as Dutch only uses grouping
for money not numbers.
* testsuite/22_locale/numpunct/members/char/3.cc: Adjust test to
account for change to glibc it_IT localedata (glibc
On Thu, 11 Oct 2018, Richard Biener wrote:
>
> The following fixes vec_construct cost calculation to properly consider
> that the inserts will happen to SSE regs thus forgo the multiplication
> done in ix86_vec_cost which is passed the wrong mode. This gets rid of
> the only call passing false
On Thu, 11 Oct 2018, Richard Biener wrote:
> On Thu, 11 Oct 2018, Richard Biener wrote:
>
> >
> > The following fixes vec_construct cost calculation to properly consider
> > that the inserts will happen to SSE regs thus forgo the multiplication
> > done in ix86_vec_cost which is passed the
On Mon, Oct 15, 2018 at 12:36 PM Alexander Monakov wrote:
>
> On Mon, 15 Oct 2018, Richard Biener wrote:
> >
> > Oh, and I personally find %` ugly ;) What non-alnum chars
> > are taken by backends?
>
> I think only double quote, backslash, backtick remain unclaimed. And of course
> ASCII \0
On 10/15/2018 01:55 AM, Nikolai Merinov wrote:
Hi Martin,
On 10/12/18 9:58 PM, Martin Sebor wrote:
On 10/12/2018 04:14 AM, Nikolai Merinov wrote:
Hello,
In https://gcc.gnu.org/ml/gcc-patches/2018-09/msg01795.html mail I
suggested patch to have ability to control behavior of
During CFG transforms like loop unrolling or peeling (or jump threading
or loop heder copying performing essentially the latter) we need
to remap dependence cliques similar to how we need to do during inlining
to avoid false non-dependences across iterations.
We've talked about this a bit in
The warnings about changes to empty struct parameter passing can be
ignored because the callers are all internal to the library, and so
compiled with the same -fabi-version as the function definitions.
It would be preferable to use #pragma GCC diagnostic warning "-Wabi=12"
to get warnings about
Another thanks for doing this.
Martin Sebor writes:
> On 10/12/2018 09:43 AM, David Malcolm wrote:
>> +Avoid using the @code{input_location} global, and the diagnostic functions
>> +that implicitly use it - use @code{error_at} and @code{warning_at} rather
>> +than @code{error} and
Hi,
> See my last message. I find myself wondering if we need to reset
> INSN_PRIORITY_STATUS in update_insn_after_change and/or calling
> update_insn_after_change on INSN in additional to calling it on DESC->insn.
I tried calling update_insn_after_change even before sending my message
but it
On 31/07/18 23:34 +0100, Jonathan Wakely wrote:
On 31/07/18 18:40 +0100, Jonathan Wakely wrote:
On 31/07/18 20:14 +0300, Ville Voutilainen wrote:
On 31 July 2018 at 20:07, Jonathan Wakely wrote:
The solution for PR 77537 causes ambiguities due to the extra copy
assignment operator taking a
Jakub Jelinek writes:
> On Mon, Oct 15, 2018 at 01:53:09PM +0300, Alexander Monakov wrote:
>> On Mon, 15 Oct 2018, Jakub Jelinek wrote:
>>
>> > On Mon, Oct 15, 2018 at 01:36:36PM +0300, Alexander Monakov wrote:
>> > > On Mon, 15 Oct 2018, Richard Biener wrote:
>> > > >
>> > > > Oh, and I
This fixes an issue with restrict noted by N2260.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk.
Richard.
2018-10-15 Richard Biener
PR middle-end/87610
* tree-ssa-structalias.c (struct vls_data): Add escaped_p member.
(visit_loadstore): When
On Mon, Oct 15, 2018 at 01:53:09PM +0300, Alexander Monakov wrote:
> On Mon, 15 Oct 2018, Jakub Jelinek wrote:
>
> > On Mon, Oct 15, 2018 at 01:36:36PM +0300, Alexander Monakov wrote:
> > > On Mon, 15 Oct 2018, Richard Biener wrote:
> > > >
> > > > Oh, and I personally find %` ugly ;) What
On Mon, 15 Oct 2018, Jakub Jelinek wrote:
> On Mon, Oct 15, 2018 at 01:36:36PM +0300, Alexander Monakov wrote:
> > On Mon, 15 Oct 2018, Richard Biener wrote:
> > >
> > > Oh, and I personally find %` ugly ;) What non-alnum chars
> > > are taken by backends?
> >
> > I think only double quote,
On Mon, Oct 15, 2018 at 01:36:36PM +0300, Alexander Monakov wrote:
> On Mon, 15 Oct 2018, Richard Biener wrote:
> >
> > Oh, and I personally find %` ugly ;) What non-alnum chars
> > are taken by backends?
>
> I think only double quote, backslash, backtick remain unclaimed. And of course
> ASCII
On Mon, 15 Oct 2018, Richard Biener wrote:
>
> Oh, and I personally find %` ugly ;) What non-alnum chars
> are taken by backends?
I think only double quote, backslash, backtick remain unclaimed. And of course
ASCII \0 through \040 and \177 ;)
Alexander
Hi,
Attached patch implements ACLE svdup, svindex, svqad/qsub, svabd and
svmul built-ins.
Committed to ACLE branch,
Thanks,
Kugan
0001-svdup-svindex-svqad-qsub-svabd-and-svmul.patch.gz
Description: application/gzip
On Fri, 12 Oct 2018 at 12:01, Richard Earnshaw (lists) <
richard.earns...@arm.com> wrote:
> On 11/10/18 14:34, Christophe Lyon wrote:
> > In FDPIC mode, we set -fPIE unless the user provides -fno-PIE, -fpie,
> > -fPIC or -fpic: indeed FDPIC code is PIC, but we want to generate code
> > for
On 09/10/18 07:11 +0200, François Dumont wrote:
Here is the communication for my yesterday's patch which I thought svn
had failed to commit (I had to interrupt it).
Similarly to what I've done for associative containers here is a
cleanup of the std::__debug::list implementation leveraging
On 15/10/18 07:23 +0200, François Dumont wrote:
This patch extend usage of C++11 direct initialization in
__debug::vector and makes some calls to operator - more consistent.
Note that I also rewrote following expression in erase method:
- return begin() + (__first.base() -
On 11/10/18 22:46 +0200, François Dumont wrote:
This patch makes extensive use of C++11 direct init in
__debug::forward_list.
Doing so I also try to detect useless creation of safe iterators in
debug implementation. In __debug::forward_list there are severals but
I wonder if it is worth
On 12/10/18 18:25 +0200, François Dumont wrote:
Here is the patch for _Bit_iterator and _Bit_const_iterator operators.
I noticed that _Bit_reference == and < operators could be made inline
friend too. Do you want me to include this change in the patch ?
* include/bits/stl_bvector.h
On Sun, Oct 14, 2018 at 10:07 PM Alexander Monakov wrote:
>
> Hello,
>
> This is an alternative proposal to the "asm inline" feature.
>
> Kernel developers have reported suboptimal optimization where use of asm
> statements such as
>
> asm("ud2\n"
> ".pushsection foo\n"
> ...
>
On Sun, Oct 14, 2018 at 1:10 PM bin.cheng wrote:
>
> Hi,
> This patch fixes PR87022. The root cause is the original code checks the
> first bit
> in dist vector for zero and we still do that after enabling loop nest
> distribution.
> For the test case, the first bit is for outer loop while the
Hi Paul,
Bootstrapped and regtested on FC28/x86_64 - OK for trunk?
Looks good. Thanks!
Regards
Thomas
Hi Paul,
The ICEs for the following PRs 58906, a variant of 77385, 80260, and 82077,
have been fixed between revision r264941 + patches and r265126 + same patches +
this patch + patch for pr56386.
Cheers,
Dominique
On Fri, Oct 12, 2018 at 10:01 PM Bill Schmidt wrote:
>
> Hi,
>
> This patch addresses SLSR bug PR87473. The underlying problem here is that
> create_add_on_incoming_edge contains code to handle a phi_arg that is equal
> to the base expression of the PHI candidate, where the increment assigned to
On Fri, Oct 12, 2018 at 6:36 PM Renlin Li wrote:
>
> Hi all,
>
> ifcvt will created versioned loop and it will permissively generate
> scalar COND_ ifn.
>
> If in the loop vectorize pass, COND_ could not get vectorized,
> the if-converted loop should be abandoned when the target doesn't support
>
If a finalization is not required we created a namespace containing
formal arguments for an internal interface definition but never used
any of these. So the whole sub_ns namespace was not wired up to the
program and consequently was never freed. The fix is to simply not
generate any finalization
On Fri, 12 Oct 2018 at 11:54, Richard Earnshaw (lists) <
richard.earns...@arm.com> wrote:
> On 11/10/18 14:34, Christophe Lyon wrote:
> > The new arm-uclinuxfdpiceabi target behaves pretty much like
> > arm-linux-gnueabi. In order the enable the same set of features, we
> > have to update several
gcc/ChangeLog:
2018-10-15 Andreas Krebbel
* config/s390/s390.c (s390_expand_vec_init): Force vector element
into reg if it isn't a general operand.
gcc/testsuite/ChangeLog:
2018-10-15 Andreas Krebbel
* g++.dg/vec-init-1.C: New test.
---
gcc/config/s390/s390.c
Hi Martin,
On 10/12/18 9:58 PM, Martin Sebor wrote:
On 10/12/2018 04:14 AM, Nikolai Merinov wrote:
Hello,
In https://gcc.gnu.org/ml/gcc-patches/2018-09/msg01795.html mail I
suggested patch to have ability to control behavior of
"__attribute__((warning))" in case when option "-Werror" enabled.
One target file (config/c6x/t-elf) lists _printf and _gcc_bcmp in
LIB2FUNCS_EXCLUDE, but that does not have any effect, since those are
not filtered away from LIB2FUNCS_ST. Another option is to do as in
config/rl78/t-rl78, which explicitly sets LIB2FUNCS_ST
# Remove __gcc_bcmp from LIB2FUNCS_ST
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