A mem-initializer is not a type, and we don't want to turn autos within it
into packs.
Tested x86_64-pc-linux-gnu, applying to trunk.
* pt.c (make_pack_expansion): Change type_pack_expansion_p to false.
---
gcc/cp/pt.c| 2 +-
.../g++.dg/cpp0x/lamb
On 03/07/2019 03:43 AM, Jonathan Wakely wrote:
> On 06/03/19 22:27 +, Pádraig Brady wrote:
>>
>>
>> On 03/06/2019 01:44 AM, Jonathan Wakely wrote:
>>> On 06/03/19 09:20 +, Pádraig Brady wrote:
On 03/06/2019 12:50 AM, Jonathan Wakely wrote:
> On 06/03/19 02:43 +, Pádraig Brad
* Claudiu Zissulescu [2019-03-25 11:56:49 +0100]:
> Hi,
>
> When not optimizing for size, we can restore first blink, hence the return
> instruction will be executed faster.
>
> OK to apply?
> Claudiu
>
> gcc/
> -xx-xx Claudiu Zissulescu
>
> * config/arc/arc.c (GMASK_LEN): Define
Hello, gentle maintainer.
This is a message from the Translation Project robot.
A revised PO file for textual domain 'gcc' has been submitted
by the German team of translators. The file is available at:
https://translationproject.org/latest/gcc/de.po
(This file, 'gcc-9.1-b20190324.de.po',
This is yet another follow up on the discussion of the fix for
the ICE in __builtin_has_attribute that started last December
with PR88383.
After my last post last week I went and added more tests to make
sure the built-in behaves as intended by comparing its result for
non-trivial expressions wit
Vlad's recent IRA change twiddled register assignments on the visium
port causing a regression on the bit_shift.c test.
Essentially the change in register assignments have resulted in changing
where register->register moves are occurring. I have verified we have
the same number of insns on each
Dear all,
my fix for pr85797 and pr83515 came along with a testcase that failed
on powerpc64*-unknown-linux-gnu. It turned out that the checks for
the arguments to the TRANSFER intrinsic had to be tightened, i.e. not
to allow some of the tests. This patch revises the checks to a version
as discu
After dicussing this on the list as archived here,
https://gcc.gnu.org/ml/gcc/2019-04/msg00026.html
these comments are not needed it seems. Therefore
remove them to update the comments with these issues
as no longer required fixes due to several things
being required to build properly from those he
simple test such as below was failing.
| void main(int argc, char *argv[])
| {
|size_t total_time = 115424; // expected 115.424
|double secs = (double)total_time/(double)1000;
|printf("%s %d %lf\n", "secs", total_time, secs); // prints 113.504
|printf("%d\n",
On 4/2/19 10:49 AM, Eric Gallager wrote:
> On 4/2/19, Ulrich Weigand wrote:
>> Hello,
>>
>> the spu-elf target in GCC supports generating code for the SPU processors
>> of the Cell Broadband Engine; it has been part of upstream GCC since 2008.
>>
>> However, at this point I believe this target is
Eric Gallagher wrote:
> On 4/2/19, Ulrich Weigand wrote:
> > Hello,
> >
> > the spu-elf target in GCC supports generating code for the SPU processors
> > of the Cell Broadband Engine; it has been part of upstream GCC since 2008.
> >
> > However, at this point I believe this target is no longer in
On 4/2/19, Ulrich Weigand wrote:
> Hello,
>
> the spu-elf target in GCC supports generating code for the SPU processors
> of the Cell Broadband Engine; it has been part of upstream GCC since 2008.
>
> However, at this point I believe this target is no longer in use:
> - There is no supported Cell/
Richard Sandiford writes:
> Richard Biener writes:
>> After the fix to RPO VN in loop header copying DF via RTL invariant
>> motion takes 50% of the compile-time for the second testcase in
>> PR46590. This is caused by the DF live problem iterating over
>> all dirty blocks for the local problem
On Tue, Apr 2, 2019 at 2:46 AM Ulrich Weigand wrote:
>
> Hello,
>
> the spu-elf target in GCC supports generating code for the SPU processors
> of the Cell Broadband Engine; it has been part of upstream GCC since 2008.
>
> However, at this point I believe this target is no longer in use:
> - There
Hi,
this patch by Andrey fixes iteration in get_all_loop_headers where we want to
visit only inner loops, not the outer loop.
Alexander
2019-04-02 Andrey Belevantsev
PR rtl-optimization/84206
* sel-sched-ir.h (get_all_loop_exits): Avoid the outer loop when
iterating o
Hi,
this patch by Andrey adjusts reset of first_insn in code_motion_path_driver in
order to avoid taking it from before the original insn.
Alexander
2019-04-02 Andrey Belevantsev
PR rtl-optimization/85876
* sel-sched.c (code_motion_path_driver): Avoid unwinding first_insn
On 4/2/19 6:45 AM, Sudakshina Das wrote:
Hi
This patch add the missing documentation bits for -mbranch-protection in
both extend.texi and invoke.texi.
Is this ok for trunk?
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index
ef7adb6a9c0fe1abd769e237fd8d0ce4c614aef8..7e1c28182138aeba1
On Tue, Apr 2, 2019 at 10:24 AM CHIGOT, CLEMENT wrote:
>
>
> On Tue, Apr 2, 2019 at 4:05 PM David Edelsohn wrote:
> > On Tue, Apr 2, 2019 at 10:01 AM CHIGOT, CLEMENT
> > wrote:
> > > On Tue, Apr 2, 2019 at 8:01 PM Ian Lance Taylor wrote:
> > > > On Mon, Apr 1, 2019 at 7:28 PM David Edelsohn w
Hi ,James:
Has the submitted patch been merged into the trunk? Looking forward to your
reply , thank you very much!
On Tue, Apr 2, 2019 at 4:05 PM David Edelsohn wrote:
> On Tue, Apr 2, 2019 at 10:01 AM CHIGOT, CLEMENT
> wrote:
> > On Tue, Apr 2, 2019 at 8:01 PM Ian Lance Taylor wrote:
> > > On Mon, Apr 1, 2019 at 7:28 PM David Edelsohn wrote:
> > > > On Mon, Apr 1, 2019 at 10:12 PM Ian Lance Taylor
> >
On Tue, 2 Apr 2019 at 12:51, Martin Liška wrote:
>
> On 3/11/19 3:00 PM, Martin Liška wrote:
> > On 3/11/19 2:38 PM, Jakub Jelinek wrote:
> >> I think for D you need to go through Iain Buclaw, I have no idea if
> >> exp->error even has the gcc internal format infrastructure. Can you split
> >> th
Thanks, Richi and Jeff!
> * config.gcc: Mark spu* targets as deprecated/obsolete.
I've now checked this in.
I've also checked in the following patch to announce the change
in htdocs.
Bye,
Ulrich
Index: htdocs/gcc-9/changes.html
On Tue, Apr 2, 2019 at 10:01 AM CHIGOT, CLEMENT wrote:
>
> On Tue, Apr 2, 2019 at 8:01 PM Ian Lance Taylor wrote:
> >
> > On Mon, Apr 1, 2019 at 7:28 PM David Edelsohn wrote:
> > >
> > > On Mon, Apr 1, 2019 at 10:12 PM Ian Lance Taylor wrote:
> > > >
> > > > On Mon, Apr 1, 2019 at 7:06 PM David
On Tue, Apr 2, 2019 at 8:01 PM Ian Lance Taylor wrote:
>
> On Mon, Apr 1, 2019 at 7:28 PM David Edelsohn wrote:
> >
> > On Mon, Apr 1, 2019 at 10:12 PM Ian Lance Taylor wrote:
> > >
> > > On Mon, Apr 1, 2019 at 7:06 PM David Edelsohn wrote:
> > > >
> > > > On Mon, Apr 1, 2019 at 9:50 PM Ian La
On 4/2/19 3:46 AM, Ulrich Weigand wrote:
> Hello,
>
> the spu-elf target in GCC supports generating code for the SPU processors
> of the Cell Broadband Engine; it has been part of upstream GCC since 2008.
>
> However, at this point I believe this target is no longer in use:
> - There is no suppor
Hi
This patch add the missing documentation bits for -mbranch-protection in
both extend.texi and invoke.texi.
Is this ok for trunk?
Sudi
*** gcc/ChangeLog ***
2019-xx-xx Sudakshina Das
* doc/extend.texi: Add deprecated comment on sign-return-address
function attribute and
On April 2, 2019 11:46:14 AM GMT+02:00, Ulrich Weigand
wrote:
>Hello,
>
>the spu-elf target in GCC supports generating code for the SPU
>processors
>of the Cell Broadband Engine; it has been part of upstream GCC since
>2008.
>
>However, at this point I believe this target is no longer in use:
>-
gcc/ChangeLog:
2019-04-02 Andreas Krebbel
("*vec_splats_bswap_vec", "*vec_splats_bswap_elem"):
New insn definition.
* config/s390/vx-builtins.md (V_HW_HSD): Move to ...
* config/s390/vector.md (V_HW_HSD): ... here.
gcc/testsuite/ChangeLog:
2019-04-02 Andreas
Make use of the new bit operation instructions when generating code
for the arch13 level.
gcc/ChangeLog:
2019-04-02 Andreas Krebbel
* config/s390/s390.c (s390_canonicalize_comparison): Convert
certain compares for arch13 in order to make use of the condition
code resul
gcc/ChangeLog:
2019-04-02 Andreas Krebbel
* config/s390/s390.md (VX_CONV_BFP, VX_CONV_INT): New mode
iterators.
(SFSI): New mode attribute.
("*fixuns_truncdfdi2_vx", "*fix_truncdfdi2_bfp_z13")
("*floatunsdidf2_z13", ): Add support for 32 bit conversions
This adds support of new instructions to the S/390 specific parts.
Important features of the new instruction set are:
- New bit operation instructions on GPRs (e.g. and with complement, ...).
- New conditional register move instructions supporting THEN and ELSE values.
- New vector instructio
Compared to the load on condition instructions we already have the new
select instruction allows to have a THEN and and ELSE source operand -
but only for register to register loads.
gcc/ChangeLog:
2019-04-02 Andreas Krebbel
* config/s390/s390.c (s390_rtx_costs): Do not add extra cost
gcc/ChangeLog:
2019-04-02 Andreas Krebbel
* config/s390/s390-builtin-types.def: Add new builtin function type.
* config/s390/s390-builtins.def: Add overloaded builtin
s390_vec_reve and low-level builtins for s390_vler and s390_vster.
* config/s390/s390.md (UNSPE
2019-04-02 Andreas Krebbel
* config/s390/vecintrin.h: Map vec_vster low-level builtins to vec_vler.
* config/s390/vx-builtins.md ("*vec_insert_and_zero_bswap")
("*vec_set_bswap_elem", "*vec_set_bswap_vec")
("*vec_extract_bswap_vec", "*vec_extract_bswap_elem"):
gcc/ChangeLog:
2019-04-02 Andreas Krebbel
* config/s390/s390.md ("xde"): Extend mode attribute to vector
types.
* config/s390/vector.md (VX_VEC_CONV_BFP, VX_VEC_CONV_INT): New
mode iterators.
("floatv2div2df2", "floatunsv2div2df2", "fix_truncv2dfv2di2")
gcc/ChangeLog:
2019-04-02 Andreas Krebbel
* config/s390/s390-builtin-types.def: Add new builtin function types.
* config/s390/s390-builtins.def: Add overloaded builtin
s390_vec_revb. Add low-level builtins for vlbr and vstbr
instructions.
* config/s390/v
gcc/ChangeLog:
2019-04-02 Andreas Krebbel
* config/s390/s390-builtin-types.def: New builtin function type
definitions.
* config/s390/s390-builtins.def (s390_vec_search_string_cc)
(s390_vec_search_string_until_zero_cc): New overloaded builtins.
(s390_vstr
The new arch13 popcount instruction counts bits in the entire 64 bit
register instead of just in 8 bit portions.
gcc/ChangeLog:
2019-04-02 Andreas Krebbel
* config/s390/s390.md ("*popcountdi_arch13_cc")
("*popcountdi_arch13_cconly", "*popcountdi_arch13"): New insn
defi
gcc/ChangeLog:
2019-04-02 Andreas Krebbel
* config/s390/s390-builtins.def (B_VXE2): New builtin flag definition.
* config/s390/s390-c.c (s390_cpu_cpp_builtins_internal): Increment
vector builtin version number in __VEC__.
---
gcc/config/s390/s390-builtins.def | 8 +
gcc/ChangeLog:
2019-04-02 Andreas Krebbel
* config/s390/s390-builtin-types.def: Add new builtin function
types.
* config/s390/s390-builtins.def (s390_vec_sldb, s390_vec_srdb):
New overloaded builtins.
(s390_vec_sldb, s390_vec_srdb): New low-level builtin
gcc/ChangeLog:
2019-04-02 Andreas Krebbel
* config/s390/s390-builtin-types.def: New builtin function type
definitions. Remove unused types.
* config/s390/s390-builtins.def (s390_vcdgb, s390_vcdlgb)
(s390_vcgdb, s390_vclgdb): Remove low-level builtin definitions.
This patch enables the command line options and provides the proper
macros for checking.
gcc/ChangeLog:
2019-04-02 Andreas Krebbel
* common/config/s390/s390-common.c (processor_flags_table): New
entry for arch13.
* config.gcc: Support arch13 with the --with-arch= confi
PR 89916 points out that the new test fails when -m32 is not supported, and
I see other tests don't try to add -m32, so I'm removing it.
PR testsuite/89916
* gcc.dg/pr86928.c: Do not attempt to add -m32.
--- testsuite/gcc.dg/pr86928.c (revision 270061)
+++ testsuite/gcc.dg/pr8692
On 3/11/19 3:00 PM, Martin Liška wrote:
> On 3/11/19 2:38 PM, Jakub Jelinek wrote:
>> I think for D you need to go through Iain Buclaw, I have no idea if
>> exp->error even has the gcc internal format infrastructure. Can you split
>> that part of the patch and post it independently?
>
> The patch
Hello,
the spu-elf target in GCC supports generating code for the SPU processors
of the Cell Broadband Engine; it has been part of upstream GCC since 2008.
However, at this point I believe this target is no longer in use:
- There is no supported Cell/B.E. hardware any more.
- There is no supporte
Hi
On 02/04/2019 03:27, H.J. Lu wrote:
> On Tue, Apr 2, 2019 at 10:05 AM Richard Henderson wrote:
>>
>> On 4/1/19 8:53 PM, Sudakshina Das wrote:
This could stand to use a comment, a moment's thinking about the sizes,
and to
use the existing asm output functions.
/*
Hello!
As exposed by corner cases in PR 89902 and PR 89903, we can't always
reliably convert variable DImode shifts from a scalar to a vector
instruction. The problem is in count register of a SSE vector shift,
where the full DImode value is considered as a shift argument. Scalar
operations with g
Hi.
One obvious one for documentation.
Martin
gcc/ChangeLog:
2019-04-02 Martin Liska
PR translation/89912
* params.def (PARAM_GRAPHITE_MAX_ARRAYS_PER_SCOP):
Fix param description of graphite-max-arrays-per-scop.
---
gcc/params.def | 2 +-
1 file changed, 1 insertion
With the same error message as on SPARC/Solaris (as I have neither the time
nor the energy to get through the awkward upstream submission process again).
Tested on SPARC/Solaris and SPARC/Linux, applied on the mainline.
2019-04-02 Eric Botcazou
* config/sparc/linux64.h (ASAN_REJECT_
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