Re: [C++ PATCH 4/4] PR c++/30277 - int-width bit-field promotion.

2019-09-20 Thread Jakub Jelinek
On Mon, Sep 16, 2019 at 12:33:28AM -0400, Jason Merrill wrote: > Here, if cp_perform_integral_promotions saw that the TREE_TYPE of a > bit-field reference was the same as the type it promotes to, it didn't do > anything. But then decay_conversion saw that the bit-field reference was > unchanged, a

[PATCH] Fix up sqrt(x) < c and sqrt(x) >= c match.pd folding (PR tree-optimization/91734, take 2)

2019-09-20 Thread Jakub Jelinek
On Mon, Sep 16, 2019 at 08:56:58AM +0200, Richard Biener wrote: > > As mentioned in the PR, the sqrt (x) < c optimization into x < c*c > > sometimes breaks the boundary case, if c2=c*c is inexact then in some cases > > we need to optimize it into x <= c*c rather than x < c*c. The original > > bugr

[PATCH, AArch64] Fix PR target/91834

2019-09-20 Thread Richard Henderson
As diagnosed in the PR. * config/aarch64/lse.S (LDNM): Ensure STXR output does not overlap the inputs. --- libgcc/config/aarch64/lse.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libgcc/config/aarch64/lse.S b/libgcc/config/aarch64/lse.S index a5f6673596

[PATCH, AArch64] PR target/91833

2019-09-20 Thread Richard Henderson
Tested on aarch64-linux (glibc) and aarch64-elf (installed newlib). The existing configure claims to be generated by 2.69, but there are changes wrt the autoconf distributed with Ubuntu 18. Nothing that seems untoward though. r~ * config/aarch64/lse-init.c: Include auto-target.h. Dis

Re: [PATCH] V4, patch #1: Rework prefixed/pc-relative lookup

2019-09-20 Thread Segher Boessenkool
Hi Mike, On Wed, Sep 18, 2019 at 07:49:18PM -0400, Michael Meissner wrote: > This patch reworks the prefixed and pc-relative memory matching functions. This mostly looks fine, thanks! A few smaller things: > (pcrel_external_address): Replace with new implementation using > address_

Re: [PATCH] Sync MIPS support from libffi master repository

2019-09-20 Thread Jeff Law
On 9/11/19 1:12 PM, Aurelien Jarno wrote: > On 2019-08-08 16:22, Jeff Law wrote: >> On 8/8/19 4:18 PM, Aurelien Jarno wrote: >>> >>> It is used by libgo, but it seems to be the last user. >> Ah, yes, I should have remembered libgo. And it links via >> ../../blahblah. Thanks for digging into it. >

Re: [C][C++] Allow targets to check calls to BUILT_IN_MD functions

2019-09-20 Thread Jeff Law
On 9/17/19 8:49 AM, Richard Sandiford wrote: > For SVE, we'd like the frontends to check calls to target-specific > built-in functions in the same way that they already do for "normal" > builtins. This patch adds a target hook for that and extends > check_builtin_function_arguments accordingly. >

Re: [PATCH] Microblaze: Type confusion in fprintf

2019-09-20 Thread Jeff Law
On 9/12/19 7:33 AM, Jonas Pfeil wrote: > A type confusion leads to illegal (and nonsensical) assembly on certain host > architectures (e.g. ARM), where HOST_WIDE_INT (64 bit) and unsigned long (32 > bit) have different alignments. So this has printed an uninitialized > register instead of the inten

[PATCH] Remove spurious extended character(s) for pa.c

2019-09-20 Thread John David Anglin
This fixes build failure on trunk. Patch committed to all active branches. Dave -- John David Anglin dave.ang...@bell.net 2019-09-20 John David Anglin * config/pa/pa.c (pa_trampoline_init): Remove spurious extended character. Index: config/pa/pa.c =

Re: AW: Fix for type confusion bug on microblaze

2019-09-20 Thread Jeff Law
On 9/12/19 1:48 AM, Jonas Pfeil wrote: > Yes, you are correct. Tested it and it works as intended. > > Thanks, > > Jonas > > --- a/gcc/config/microblaze/microblaze.h > +++ b/gcc/config/microblaze/microblaze.h > @@ -695,7 +695,7 @@ do { >

Re: [SVE] PR91532

2019-09-20 Thread Jeff Law
On 9/19/19 10:19 AM, Prathamesh Kulkarni wrote: > Hi, > For PR91532, the dead store is trivially deleted if we place dse pass > between ifcvt and vect. Would it be OK to add another instance of dse there ? > Or should we add an ad-hoc "basic-block dse" sub-pass to ifcvt that > will clean up the dea

[PATCH] [og9] Handle references in OpenACC "private" clauses

2019-09-20 Thread Julian Brown
This patch rewrites reference-type variables appearing in OpenACC "private" clauses in a similar way to how such variables are handled in reduction clauses. Otherwise, the mechanism used to privatize reference variables is currently ill-suited to the worker-partitioning mechanism used for AMD GCN,

[PATCH] 2019-09-20 Kamil Rytarowski

2019-09-20 Thread Kamil Rytarowski
GCC version of https://reviews.llvm.org/D67719 From 422827582d84e078df2a8e303d807c830a155ab5 Mon Sep 17 00:00:00 2001 From: Kamil Rytarowski Date: Fri, 20 Sep 2019 22:02:09 +0200 Subject: [PATCH] 2019-09-20 Kamil Rytarowski * cppbuiltin.c (define_builtin_macros_for_compilation_flags):

[PATCH] PR fortran/91426: Colorize %L text to match diagnostic_show_locus

2019-09-20 Thread David Malcolm
PR fortran/91426 reports that the following program program main 10 continue 10 continue end yields: label.f90:2:2: 2 | 10 continue | 1 3 | 10 continue | 2 Error: Duplicate statement label 10 at (1) and (2) where the '1' and '2' annotating lines 2 and 3 in the source are

Re: Extend neg_const_int simplifications to other const rtxes

2019-09-20 Thread Jeff Law
On 9/18/19 12:56 AM, Richard Sandiford wrote: > This patch generalises some neg_const_int-based rtx simplifications > so that they handle all CONST_SCALAR_INTs and also CONST_POLY_INT. > This actually simplifies things a bit, since we no longer have > to treat HOST_WIDE_INT_MIN specially. > > This

Re: [PATCH target/86811] Mark VAX as not needing speculation barriers

2019-09-20 Thread Jeff Law
On 9/17/19 2:59 PM, co...@sdf.org wrote: > According to Bob Supnik (who is a very authoritative source on VAX), > >> Funny you should ask. The short answer is no. No VAX ever did >> speculative or out of order execution. > > As such, marking VAX as not needing speculation barriers. > > >

[Darwin, X86, testsuite, committed] Fix naked-1.c fail.

2019-09-20 Thread Iain Sandoe
This fails at m32 because the scan-asm is looking for an absence of "ret”. Darwin is generating the correct code for the function but the picbase thunk has a 'ret' insn. Fixed by making the test use -mdynamic-no-pic for m32. tested on x86_64-darwin16, x86_64-pc-linux-gnu (m32/m64) applied to mai

Re: Deprecating cc0 (and consequently cc0 targets)

2019-09-20 Thread Jeff Law
On 9/20/19 11:22 AM, Richard Biener wrote: > On September 20, 2019 5:38:38 PM GMT+02:00, Jeff Law > wrote: >> At the register allocation BOF during the Cauldron someone (I >> forget who) raised the question of when/how do we get rid of >> reload. >> >> The first step in that process is to drop su

Re: Deprecating cc0 (and consequently cc0 targets)

2019-09-20 Thread Joseph Myers
I think the m68k-*-uclinuxoldabi* and vax-*-vms* cases need to move up to the top of that case statement (duplicating the "not supported" error), to keep that error even in the --enable-obsolete case. I see tile* targets are referenced in the diff context. They were obsoleted in GCC 8 (and hav

Re: Deprecating cc0 (and consequently cc0 targets)

2019-09-20 Thread Richard Biener
On September 20, 2019 5:38:38 PM GMT+02:00, Jeff Law wrote: >At the register allocation BOF during the Cauldron someone (I forget >who) raised the question of when/how do we get rid of reload. > >The first step in that process is to drop support for cc0. cc0 is a >horribly antiquated mechanism fo

Question on direction of GCC support for HWASAN.

2019-09-20 Thread Matthew Malcomson
Hello, I'm nearing the point where I think the hardware-asan patch series could go in and would appreciate some feedback on what features need to be implemented before it could be put into trunk. (The RFC can be found at https://gcc.gnu.org/ml/gcc-patches/2019-09/msg00387.html, the only change to

[OG9][committed] - [Patch] PR fortran/78260 - OpenACC + OpenMP target fixes - esp. with function-result variables

2019-09-20 Thread Tobias Burnus
I have now committed this patch also to the OG9 (openacc-gcc-9) branch. Thanks for the reviews of the trunk patch! Tobias On 9/20/19 5:47 PM, Tobias Burnus wrote: Hi all, This patch does two things: (A) For OpenACC, only, it fixes the is-variable check. That check missed to reject module na

Re: [Patch] PR fortran/78260 - OpenACC + OpenMP target fixes - esp. with function-result variables

2019-09-20 Thread Steve Kargl
On Fri, Sep 20, 2019 at 05:47:59PM +0200, Tobias Burnus wrote: > (A) For OpenACC, only, it fixes the is-variable check. That check missed > to reject module names (as noted in the PR) but as my testing showed, it > also wrongly rejected function-result variables. (i.e. where the > return-value v

Re: [Patch] PR fortran/78260 - OpenACC + OpenMP target fixes - esp. with function-result variables

2019-09-20 Thread Jakub Jelinek
On Fri, Sep 20, 2019 at 05:47:59PM +0200, Tobias Burnus wrote: > This patch does two things: > > (A) For OpenACC, only, it fixes the is-variable check. That check missed to > reject module names (as noted in the PR) but as my testing showed, it also > wrongly rejected function-result variables. (i

[Patch] PR fortran/78260 - OpenACC + OpenMP target fixes - esp. with function-result variables

2019-09-20 Thread Tobias Burnus
Hi all, This patch does two things: (A) For OpenACC, only, it fixes the is-variable check. That check missed to reject module names (as noted in the PR) but as my testing showed, it also wrongly rejected function-result variables. (i.e. where the return-value variable has the same name as the

Re: Avoid adding impossible copies in ira-conflicts.c:process_reg_shuffles

2019-09-20 Thread Vladimir Makarov
On 09/17/2019 12:50 PM, Richard Sandiford wrote: If an insn requires two operands to be tied, and the input operand dies in the insn, IRA acts as though there were a copy from the input to the output with the same execution frequency as the insn. Allocating the same register to the input and the

Deprecating cc0 (and consequently cc0 targets)

2019-09-20 Thread Jeff Law
At the register allocation BOF during the Cauldron someone (I forget who) raised the question of when/how do we get rid of reload. The first step in that process is to drop support for cc0. cc0 is a horribly antiquated mechanism for describing how to handle condition codes. It has numerous limit

Re: [ARM/FDPIC v6 13/24] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture

2019-09-20 Thread Christophe Lyon
On Fri, 20 Sep 2019 at 14:51, Matthew Malcomson wrote: > > On 19/09/19 16:14, Kyrill Tkachov wrote: > > > > On 9/19/19 4:13 PM, Christophe Lyon wrote: > >> On Tue, 17 Sep 2019 at 14:08, Christophe Lyon > >> wrote: > >> > > >> > On 17/09/2019 13:38, Wilco Dijkstra wrote: > >> > > Hi Christophe, >

RE: [PATCH] Reduction of conditional operations for vectorization

2019-09-20 Thread Marc Glisse
On Fri, 20 Sep 2019, Yuliang Wang wrote: Hi Richard, Thanks for your comments and tips. fold_binary_op_with_conditional_arg performs the reverse transformation to this patch in certain situations: /* Transform `a + (b ? x : y)' into `b ? (a + x) : (a + y)'. ... */ static tree fold_binary_o

Re: [Ada] Fix 32/64bit mistake on SYSTEM_INFO component in s-win32

2019-09-20 Thread Arnaud Charlet
> I'd keep the target list alphabetical. Can do so when the Solaris patch > goes in. > > Here's what I've successfully tested last night on both > i386-pc-solaris2.11 and sparc-sun-solaris2.11, shamelessly stolen from > the Linux counterparts. If it is acceptable, I'd add *-*-solaris2.* to > the

RE: [PATCH] Reduction of conditional operations for vectorization

2019-09-20 Thread Yuliang Wang
Hi Richard, Thanks for your comments and tips. fold_binary_op_with_conditional_arg performs the reverse transformation to this patch in certain situations: /* Transform `a + (b ? x : y)' into `b ? (a + x) : (a + y)'. ... */ static tree fold_binary_op_with_conditional_arg (location_t loc, ..

Re: Make assemble_real generate canonical CONST_INTs

2019-09-20 Thread Christophe Lyon
On Wed, 18 Sep 2019 at 11:41, Richard Sandiford wrote: > > Richard Biener writes: > > On Tue, Sep 17, 2019 at 4:33 PM Richard Sandiford > > wrote: > >> > >> assemble_real used GEN_INT to create integers directly from the > >> longs returned by real_to_target. assemble_integer then went on > >>

Re: [Ada] Fix 32/64bit mistake on SYSTEM_INFO component in s-win32

2019-09-20 Thread Rainer Orth
Hi Olivier, >> On 19 Sep 2019, at 18:40, Olivier Hainque wrote: > Given that the test cannot compile on anything but *-*-linux* and *-*-mingw*, I'd rather restrict the test to those two (or more targets that decide to implement the missing interface). > >> Works for me as well. > [

Re: [Ada] Fix 32/64bit mistake on SYSTEM_INFO component in s-win32

2019-09-20 Thread Rainer Orth
Hi Iain, >> On 19 Sep 2019, at 15:51, Rainer Orth wrote: >> > On 18 Sep 2019, at 09:39, Pierre-Marie de Rodat wrote: >>> gcc/testsuite/ * gnat.dg/system_info1.adb: New testcase. >>> >>> This new test fails everywhere on Darwin, which doesn’t have an >>> imp

[PATCH] Some vect_create_epilog_for_reduction refactoring

2019-09-20 Thread Richard Biener
Plus simplification in get_initial_def_for_reduction, avoiding some of the + 0 adjustments I've seen created. Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. Richard. 2019-09-20 Richard Biener * tree-vect-loop.c (get_initial_def_for_reduction): Simplify, avoi

Re: [ARM/FDPIC v6 13/24] [ARM] FDPIC: Force LSB bit for PC in Cortex-M architecture

2019-09-20 Thread Matthew Malcomson
On 19/09/19 16:14, Kyrill Tkachov wrote: > > On 9/19/19 4:13 PM, Christophe Lyon wrote: >> On Tue, 17 Sep 2019 at 14:08, Christophe Lyon >> wrote: >> > >> > On 17/09/2019 13:38, Wilco Dijkstra wrote: >> > > Hi Christophe, >> > > >> > > Can you explain this in more detail - it doesn't make sense

Re: [Ada] Fix 32/64bit mistake on SYSTEM_INFO component in s-win32

2019-09-20 Thread Olivier Hainque
Hello Iain & Rainer, > On 19 Sep 2019, at 18:40, Olivier Hainque wrote: >>> Given that the test cannot compile on anything but *-*-linux* and >>> *-*-mingw*, I'd rather restrict the test to those two (or more targets >>> that decide to implement the missing interface). > Works for me as well. [

Re: PR88751: Backport to GCC 8 and 9 branches?

2019-09-20 Thread Richard Biener
On Fri, Sep 20, 2019 at 11:28 AM Andreas Krebbel wrote: > > On 06.09.19 12:48, Richard Biener wrote: > > On Fri, Sep 6, 2019 at 10:11 AM Andreas Krebbel > > wrote: > >> > >> Hi, > >> > >> since this caused a critical performance regression in the OpenJ9 byte > >> code interpreter after > >> mig

Re: [PATCH] Reduction of conditional operations for vectorization

2019-09-20 Thread Richard Biener
On Fri, Sep 20, 2019 at 10:09 AM Yuliang Wang wrote: > > Hi, > > ifcvt transforms the following conditional operation reduction pattern: > > if ( condition ) > a = a OP b; > else > a = a OP c; > > Into: > > a_1 = a OP b; > a_2 = a OP c; > a = condition ? a_1 : a_2; > > Where OP i

Re: [PATCH][x86] Fix PR91814

2019-09-20 Thread Uros Bizjak
On Fri, Sep 20, 2019 at 1:11 PM Richard Biener wrote: > > On Fri, 20 Sep 2019, Uros Bizjak wrote: > > > On Fri, Sep 20, 2019 at 10:32 AM Richard Biener wrote: > > > > > > On Fri, 20 Sep 2019, Uros Bizjak wrote: > > > > > > > On Thu, Sep 19, 2019 at 5:43 PM Uros Bizjak wrote: > > > > > > > > > >

Re: [PATCH][x86] Fix PR91814

2019-09-20 Thread Richard Biener
On Fri, 20 Sep 2019, Uros Bizjak wrote: > On Fri, Sep 20, 2019 at 10:32 AM Richard Biener wrote: > > > > On Fri, 20 Sep 2019, Uros Bizjak wrote: > > > > > On Thu, Sep 19, 2019 at 5:43 PM Uros Bizjak wrote: > > > > > > > > On Thu, Sep 19, 2019 at 5:30 PM Richard Biener > > > > wrote: > > > > >

[COMMITTED][GCC9] Backport RISC-V: Fix more splitters accidentally calling gen_reg_rtx.

2019-09-20 Thread Kito Cheng
This patch fix PR target/91635, back port to gcc-9-branch from trunk, committed :) From 430008a798822a0b6894308c841e77a5adc920d5 Mon Sep 17 00:00:00 2001 From: kito Date: Fri, 20 Sep 2019 10:41:51 + Subject: [PATCH] RISC-V: Fix more splitters accidentally calling gen_reg_rtx. PR target/91683

Re: [PATCH] Remove vectorizer reduction operand swapping

2019-09-20 Thread Richard Biener
On Fri, 20 Sep 2019, Rainer Orth wrote: > Hi Richard, > > > On Thu, 19 Sep 2019, Richard Sandiford wrote: > > > >> Richard Biener writes: > >> > It shouldn't be neccessary. > >> > >> SVE is the counter-example :-) But the fix is simpler than the code > >> you removed, so it's still a net win.

Re: [PATCH] Remove vectorizer reduction operand swapping

2019-09-20 Thread Rainer Orth
Hi Richard, > On Thu, 19 Sep 2019, Richard Sandiford wrote: > >> Richard Biener writes: >> > It shouldn't be neccessary. >> >> SVE is the counter-example :-) But the fix is simpler than the code >> you removed, so it's still a net win. > > Yeah, I meant it shouldn't be necessary to swap operand

[PATCH] Fix PR91821

2019-09-20 Thread Richard Biener
The following makes sure pattern detection also works with "non-canonical" order of operands in reduction stmts. Bootstrapped and tested on x86_64-unknown-linux-gnu, verified it fixes the powerpc FAIL, applied. Richard. 2019-09-20 Richard Biener PR tree-optimization/91821 *

[SPARC] Fix PR target/91269

2019-09-20 Thread Eric Botcazou
This is a regression present on the mainline and 9 branch: the compiler (LRA) generates an instruction using unaligned double FP registers. This has been a known weakness since the switch to LRA because there is no longer an explicit constraint for aligned double FP registers. Bootstrapped/reg

Re: PR88751: Backport to GCC 8 and 9 branches?

2019-09-20 Thread Andreas Krebbel
On 06.09.19 12:48, Richard Biener wrote: > On Fri, Sep 6, 2019 at 10:11 AM Andreas Krebbel wrote: >> >> Hi, >> >> since this caused a critical performance regression in the OpenJ9 byte code >> interpreter after >> migrating from GCC 4.8 to GCC 7 I would like to backport this patch also to >> GCC

Fix PR c/91815

2019-09-20 Thread Eric Botcazou
This gets rid of a bogus error issued by the C compiler on a type definition at file scope when there is a preceding external declaration in a local scope for the same symbol (but the error is still issued if the preceding external declaration is also at file scope). Bootstrapped/regtested on x

Re: [PATCH][x86] Fix PR91814

2019-09-20 Thread Uros Bizjak
On Fri, Sep 20, 2019 at 10:32 AM Richard Biener wrote: > > On Fri, 20 Sep 2019, Uros Bizjak wrote: > > > On Thu, Sep 19, 2019 at 5:43 PM Uros Bizjak wrote: > > > > > > On Thu, Sep 19, 2019 at 5:30 PM Richard Biener wrote: > > > > > > > > > > > > Boostrapped and tested on x86_64-unknown-linux-gnu

[PATCH] Fix PR91822

2019-09-20 Thread Richard Biener
The following restores the for_reduction parameter. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2019-09-20 Richard Biener PR tree-optimization/91822 * tree-vectorizer.h (vectorizable_condition): Restore for_reduction parameter. * t

Re: [PATCH][x86] Fix PR91814

2019-09-20 Thread Richard Biener
On Fri, 20 Sep 2019, Uros Bizjak wrote: > On Thu, Sep 19, 2019 at 5:43 PM Uros Bizjak wrote: > > > > On Thu, Sep 19, 2019 at 5:30 PM Richard Biener wrote: > > > > > > > > > Boostrapped and tested on x86_64-unknown-linux-gnu. > > > > > > OK? > > > > OK. > > Hm, something is not working correctly

Re: [patch, testsuite, arm] Fix ICE in gcc.dg/gimplefe-28.c

2019-09-20 Thread Kyrill Tkachov
On 9/19/19 7:44 PM, Sandra Loosemore wrote: On 9/19/19 2:40 AM, Kyrill Tkachov wrote: Index: gcc/testsuite/lib/target-supports.exp === --- gcc/testsuite/lib/target-supports.exp    (revision 275699) +++ gcc/testsuite/lib/target-su

Re: [PATCH][x86] Fix PR91814

2019-09-20 Thread Uros Bizjak
On Thu, Sep 19, 2019 at 5:43 PM Uros Bizjak wrote: > > On Thu, Sep 19, 2019 at 5:30 PM Richard Biener wrote: > > > > > > Boostrapped and tested on x86_64-unknown-linux-gnu. > > > > OK? > > OK. Hm, something is not working correctly here. For the testcase, I get: main: vmovq %xmm0, %xm

[PATCH] Reduction of conditional operations for vectorization

2019-09-20 Thread Yuliang Wang
Hi, ifcvt transforms the following conditional operation reduction pattern: if ( condition ) a = a OP b; else a = a OP c; Into: a_1 = a OP b; a_2 = a OP c; a = condition ? a_1 : a_2; Where OP is one of { plus minus mult min max and ior eor }. This patch further optimizes the

Re: [PATCH] Come up with debug counter for store-merging.

2019-09-20 Thread Martin Liška
On 9/19/19 4:57 PM, Bernhard Reutner-Fischer wrote: > On Wed, 18 Sep 2019 11:01:59 +0200 > Richard Biener wrote: > >> On Wed, Sep 18, 2019 at 9:22 AM Martin Liška wrote: >>> >>> Hi. >>> >>> After I spent quite some time with PR91758, I would like >>> to see a debug counter in store merging for t

Re: [PATCH] Fix PR91790

2019-09-20 Thread Richard Biener
On Thu, 19 Sep 2019, Bill Schmidt wrote: > > On 9/19/19 1:34 PM, Segher Boessenkool wrote: > > Hi! > > > > On Tue, Sep 17, 2019 at 09:45:54AM +0200, Richard Biener wrote: > >> The following fixes an old vectorizer issue with realignment support > >> (thus only powerpc is affected) and BB vectoriz