[PATCH V2]rs6000: re-enable web and rnreg with -funroll-loops

2019-12-23 Thread Jiufu Guo
Jiufu Guo writes: > Segher Boessenkool writes: > >> Hi! >> >> On Fri, Dec 20, 2019 at 02:34:05PM +0800, Jiufu Guo wrote: >>> Previously, limited unrolling was enabled at O2 for powerpc in r278034. At >>> that >>> time, -fweb and -frename-registers were not enabled together with >>> -funroll-l

Re: [PATCH] enable -fweb and -frename-registers at -O3 for rs6000

2019-12-23 Thread Jiufu Guo
Jiufu Guo writes: > Segher Boessenkool writes: > >> Hi! >> [...] >>> --- a/gcc/testsuite/gcc.dg/torture/stackalign/builtin-return-1.c >>> +++ b/gcc/testsuite/gcc.dg/torture/stackalign/builtin-return-1.c >>> @@ -2,6 +2,7 @@ >>> /* Originator: Andrew Church */ >>> /* { dg-do run } */ >>> /* {

Re: [PATCH] libstdcxx: Update ctype_base.h from NetBSD upstream

2019-12-23 Thread Jonathan Wakely
On Sat, 21 Dec 2019 at 23:37, Gerald Pfeifer wrote: > > Hi Matthew, > > On Mon, 4 Feb 2019, Matthew Bauer wrote: > > The ctype_base.h file in libstdc++-v3 is out of date for NetBSD. They > > have changed their ctype.h definition. It was updated in their intree > > libstdc++-v3 but not in the GCC o

Check mask argument's type when vectorising conditional functions

2019-12-23 Thread Richard Sandiford
We can't yet vectorise conditional internal functions whose boolean condition is fed by a data access (or more generally, by a tree of logic ops in which all the leaves are data accesses). Although we should add that eventually, we'd need further work to generate good-quality code. Unlike vectori

Re: [PATCH, AArch64 v4 4/6] aarch64: Add out-of-line functions for LSE atomics

2019-12-23 Thread Roman Zhuykov
This caused: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93053 -- Roman Richard Henderson wrote 18.09.2019 04:58: This is the libgcc part of the interface -- providing the functions. Rationale is provided at the top of libgcc/config/aarch64/lse.S. * config/aarch64/lse-init.c: New fil

Re: [GCC][PATCH][Aarch64] Add Bfloat16_t scalar type, vector types and machine modes to Aarch64 back-end [1/2]

2019-12-23 Thread Stam Markianos-Wright
On 12/19/19 10:01 AM, Richard Sandiford wrote: > Stam Markianos-Wright writes: >> [...] >> @@ -659,6 +666,8 @@ aarch64_simd_builtin_std_type (machine_mode mode, >> return float_type_node; >> case E_DFmode: >> return double_type_node; >> +case E_BFmode: >> + return

Re: [GCC][PATCH][Aarch64] Add Bfloat16_t scalar type, vector types and machine modes to Aarch64 back-end [1/2]

2019-12-23 Thread Richard Sandiford
Stam Markianos-Wright writes: > On 12/19/19 10:01 AM, Richard Sandiford wrote: >>> + >>> +#pragma GCC push_options >>> +#pragma GCC target ("arch=armv8.2-a+bf16") >>> +#ifdef __ARM_FEATURE_BF16_SCALAR_ARITHMETIC >>> + >>> +typedef __bf16 bfloat16_t; >>> + >>> + >>> +#endif >>> +#pragma GCC pop_opt

Re: [PATCH V2]rs6000: re-enable web and rnreg with -funroll-loops

2019-12-23 Thread Segher Boessenkool
On Mon, Dec 23, 2019 at 04:11:35PM +0800, Jiufu Guo wrote: > To align with original behavior better, I updated the patch and attached > it at the end of this mail. > The updated patch also pass bootstrap and regtests. > > Is this patch ok for trunk? If this performs well, okay for trunk. Thanks!

Re: [GCC][PATCH][AArch64] ACLE intrinsics bfmmla and bfmlal for AArch64 AdvSIMD

2019-12-23 Thread Richard Sandiford
Thanks for the patch, looks good. Delia Burduv writes: > This patch adds the ARMv8.6 ACLE intrinsics for bfmmla, bfmlalb and bfmlalt > as part of the BFloat16 extension. > (https://developer.arm.com/architectures/instruction-sets/simd-isas/neon/intrinsics) > The intrinsics are declared in arm_ne

Re: [GCC][PATCH][AArch64] ACLE intrinsics for BFCVTN, BFCVTN2 (AArch64 AdvSIMD) and BFCVT (AArch64 FP)

2019-12-23 Thread Richard Sandiford
Some of the comments on the BFMMLA/BFMLA[LT] patch apply here too. Delia Burduv writes: > This patch adds the Armv8.6-a ACLE intrinsics for bfmmla, bfmlalb and > bfmlalt as part of the BFloat16 extension. That's the other patch :-) > [...] > diff --git a/gcc/config/aarch64/aarch64-simd.md > b

Re: [PATCH 09/13] OpenACC 2.6 deep copy: C and C++ front-end parts

2019-12-23 Thread Thomas Schwinge
Hi! On 2019-12-17T22:03:49-0800, Julian Brown wrote: > --- /dev/null > +++ b/gcc/testsuite/c-c++-common/goacc/mdc-1.c > @@ -0,0 +1,55 @@ > +/* Test OpenACC's support for manual deep copy, including the attach > + and detach clauses. */ > + > +/* { dg-do compile { target int32 } } */ > +/* { dg

libgo patch committed: Hurd portability patches

2019-12-23 Thread Ian Lance Taylor
This libgo patch by Svante Signell adds some Hurd portability patches to libgo. These are from GCC PR 93020. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu. Committed to mainline. Ian Index: gcc/go/gofrontend/MERGE === --

[PATCH] Remove redundant builtins for avx512f scalar instructions.

2019-12-23 Thread Hongyu Wang
Hi: For avx512f scalar instructions, current builtin function like __builtin_ia32_*{sd,ss}_round can be replaced by __builtin_ia32_*{sd,ss}_mask_round with mask parameter set to -1. This patch did the replacement and remove the corresponding redundant builtins. Bootstrap is ok, make-check ok f