Re: std:vec for classes with constructor? (Was: Re: [patch] multi-range implementation for value_range (irange))

On Thu, Aug 6, 2020 at 3:07 AM Andrew MacLeod wrote: > > On 8/5/20 12:54 PM, Richard Biener via Gcc-patches wrote: > > On August 5, 2020 5:09:19 PM GMT+02:00, Martin Jambor > > wrote: > >> On Fri, Jul 31 2020, Aldy Hernandez via Gcc-patches wrote: > >> [...] > >> > >>> * ipa-cp changes from vec

Re: [PATCH v5] vect/rs6000: Support vector with length cost modeling

on 2020/8/5 下午10:06, Segher Boessenkool wrote: > On Wed, Aug 05, 2020 at 08:27:57AM +0100, Richard Sandiford wrote: >> OK for the vectoriser parts with those changes, thanks. > > The rs6000 part is still fine as well. Thanks! > > Committed via r11-2586. Thanks all! BR, Kewen

Re: [PATCH][Hashtable 5/6] Remove H1/H2 template parameters

On 17/07/20 1:35 pm, Jonathan Wakely wrote: On 19/12/19 20:22 +0100, François Dumont wrote: Because of this change printers.py has to be updated too. François On 11/17/19 10:15 PM, François Dumont wrote: H1 used to be a reference to the user Hash, now _Hashtable and unordered types agree

Re: [PATCH] testsuite: Update some vect cases for partial vectors

"Kewen.Lin" writes: > diff --git a/gcc/testsuite/gcc.dg/vect/slp-multitypes-11.c > b/gcc/testsuite/gcc.dg/vect/slp-multitypes-11.c > index 5200ed1cd94..da6fb12eb0d 100644 > --- a/gcc/testsuite/gcc.dg/vect/slp-multitypes-11.c > +++ b/gcc/testsuite/gcc.dg/vect/slp-multitypes-11.c > @@ -48,6 +48,9 @

Re: [PATCH v5] dse: Remove partial load after full store for high part access[PR71309]

luoxhu writes: > Hi Richard, > > On 2020/8/3 22:01, Richard Sandiford wrote: >>> /* Try a wider mode if truncating the store mode to NEW_MODE >>> requires a real instruction. */ >>> if (maybe_lt (GET_MODE_SIZE (new_mode), GET_MODE_SIZE (store_mode)) >>> @@ -1779,6 +1780,25 @@

Re: [Patch, fortran] PR96102 - ICE in check_host_association, at fortran/resolve.c:5994

Dear All, Dominique has kindly pointed out that the error message in the patch does not correspond to the errors in the testcase. This came about because the submitted patch was an earlier version of that on my tree. Please find attached the correct version of the patch. The principle is the same

Re: std:vec for classes with constructor?

Andrew MacLeod via Gcc-patches writes: > On 8/5/20 12:54 PM, Richard Biener via Gcc-patches wrote: >> On August 5, 2020 5:09:19 PM GMT+02:00, Martin Jambor >> wrote: >>> On Fri, Jul 31 2020, Aldy Hernandez via Gcc-patches wrote: >>> [...] >>> * ipa-cp changes from vec to std::vec.

Re: [patch] multi-range implementation for value_range (irange)

Gerald Pfeifer writes: > 2020-08-05 Gerald Pfeifer > > * ipa-fnsummary.c (INCLUDE_VECTOR): Define. > Remove direct inclusion of . OK, thanks. Richard > diff --git a/gcc/ipa-fnsummary.c b/gcc/ipa-fnsummary.c > index 49bab04524b..59e52927151 100644 > --- a/gcc/ipa-fnsummar

Re: [PATCH] emit-rtl.c: Allow vector subreg of float vectors

Andrew Stubbs writes: > This patch is a prerequisite for some patches I have to add multiple > vector sizes on amdgcn. > > The problem is that validate_subreg rejects things like this: > >(subreg:V32SF (reg:V64SF) 0) > > These are commonly generated by the compiler. The integer equivalents >

Re: std:vec for classes with constructor? (Was: Re: [patch] multi-range implementation for value_range (irange))

On 8/5/20 12:54 PM, Richard Biener via Gcc-patches wrote: On August 5, 2020 5:09:19 PM GMT+02:00, Martin Jambor wrote: On Fri, Jul 31 2020, Aldy Hernandez via Gcc-patches wrote: [...] * ipa-cp changes from vec to std::vec. We are using std::vec to ensure constructors are run, which they are

Re: [PATCH v5] dse: Remove partial load after full store for high part access[PR71309]

Hi Richard, On 2020/8/3 22:01, Richard Sandiford wrote: /* Try a wider mode if truncating the store mode to NEW_MODE requires a real instruction. */ if (maybe_lt (GET_MODE_SIZE (new_mode), GET_MODE_SIZE (store_mode)) @@ -1779,6 +1780,25 @@ find_shift_sequence (poly_int6

Re: RFC: Monitoring old PRs, new dg directives

On Wed, Aug 05, 2020 at 11:03:08AM -0400, Nathan Sidwell wrote: > On 8/4/20 8:54 PM, Marek Polacek via Gcc-patches wrote: > > On Tue, Aug 04, 2020 at 03:33:23PM -0700, Mike Stump wrote: > > > I think the read of the room is that people think it would be generally > > > useful, so let approve the g

Re: [PATCH] rs6000: Don't ICE when spilling an MMA accumulator

Hi! On Wed, Aug 05, 2020 at 02:02:36PM -0500, Peter Bergner wrote: > The following patch fixes one of the bugs discovered in PR96466, namely > when we spill an accumulator that has a known zero value. In that case, > LRA would emit a new (set (reg:PXI ...) 0) insn, but it would not use the > mma_

Re: [patch] multi-range implementation for value_range (irange)

[ Jeff, approval request below ] On Wed, 5 Aug 2020, Aldy Hernandez wrote: >> I believe this has broken the bootstrap with clang (specifically >> FreeBSD clang version 10.0.0): >> >> In file included from /scratch/tmp/gerald/GCC-HEAD/gcc/c/gimple-parser.c:44: >> In file included from /scratch/tmp/

Re: [committed] libstdc++: Replace operator>>(istream&, char*) [LWG 2499]

On 8/5/20 3:25 PM, Jonathan Wakely wrote: P0487R1 resolved LWG 2499 for C++20 by removing the operator>> overloads that have high risk of buffer overflows. They were replaced by equivalents that only accept a reference to an array, and so can guarantee not to write past the end of the array. In

[committed] libstdc++: Break long lines to fit in 80 columns

libstdc++-v3/ChangeLog: * include/std/atomic (atomic::store): Reformat. Tested powerpc64le-linux. Committed to trunk. commit b2d4ba65dca05c0f239dcaf5080f88137ce7b54c Author: Jonathan Wakely Date: Wed Aug 5 22:48:17 2020 libstdc++: Break long lines to fit in 80 columns li

Re: [committed] libstdc++: ParallelSTL is now part of oneAPI DPC++ Library

On 31/07/20 22:45 +0100, Jonathan Wakely wrote: On 31/07/20 23:23 +0200, Gerald Pfeifer wrote: Pushed. (Something was off with the ChangeLog detection I'm afraid. I first got an error message and what ended up in the commit didn't look completely consistent.) I noticed the other day that thi

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

Hi, Richard, Thanks a lot for your careful review and detailed comments. > On Aug 4, 2020, at 2:35 AM, Richard Biener wrote: > > I have a few comments below - I'm not sure I'm qualified to fully > review the rest though. Could you let me know who will be the more qualified person to fully r

Re: [committed] libstdc++: Replace operator>>(istream&, char*) [LWG 2499]

On 05/08/20 22:25 +0100, Jonathan Wakely wrote: P0487R1 resolved LWG 2499 for C++20 by removing the operator>> overloads that have high risk of buffer overflows. They were replaced by equivalents that only accept a reference to an array, and so can guarantee not to write past the end of the array

[committed] libstdc++: Replace operator>>(istream&, char*) [LWG 2499]

P0487R1 resolved LWG 2499 for C++20 by removing the operator>> overloads that have high risk of buffer overflows. They were replaced by equivalents that only accept a reference to an array, and so can guarantee not to write past the end of the array. In order to support both the old and new functi

Re: [PATCH] rs6000: Don't ICE when spilling an MMA accumulator

On 8/5/20 2:02 PM, Peter Bergner wrote: > This patch fixes the ICE and is in the middle of regression testing. > Ok for trunk if the testing comes back clean? Testing was clean with no regressions. Peter

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

>> >> From The SECURE project and GCC in GCC Cauldron 2018: >> >> Speaker: Graham Markall >> >> The SECURE project is a 15 month program funded by Innovate UK, to >> take well known security techniques from academia and make them >> generally available in standard compilers, specfically GCC and

Re: RFC: Monitoring old PRs, new dg directives

On Aug 4, 2020, at 5:54 PM, Marek Polacek wrote: >> As you find it difficult to express a test using the existing mechanisms, >> let's talk about those and see if anyone has a good idea on how to express >> it. I think ICEs are the most annoying to manage, but, I think excess and >> prune shou

Re: [PATCH][RFC] diagnostics: Add support for Unicode drawing characters

On Fri, Jul 24, 2020 at 02:49:36PM +0100, Richard Sandiford wrote: > Lewis Hyatt via Gcc-patches writes: > > On Thu, Jul 23, 2020 at 05:47:28PM -0400, David Malcolm wrote: > >> On Thu, 2020-07-23 at 12:28 -0400, Lewis Hyatt via Gcc-patches wrote: > >> > Hello- > >> > > >> > The attached patch is

Re: RFC: Monitoring old PRs, new dg directives

On Tue, Aug 04, 2020 at 08:54:32PM -0400, Marek Polacek via Gcc-patches wrote: > On Tue, Aug 04, 2020 at 03:33:23PM -0700, Mike Stump wrote: > > A word of caution, if we produce core files, before you add tons of core > > file producing test cases, you'll want to submit a, ulimit -c 0 patch that

Re: [PATCH] c++: dependent constraint on placeholder return type [PR96443]

On 8/4/20 8:00 PM, Patrick Palka wrote: On Tue, 4 Aug 2020, Patrick Palka wrote: In the testcase below, we never substitute function-template arguments into f15's placeholder-return-type constraint, which leads to us incorrectly rejecting this instantiation in do_auto_deduction due to satisfact

Re: RFC: Monitoring old PRs, new dg directives

On Aug 5, 2020, at 5:56 AM, Marek Polacek wrote: > > Sorry for being unclear. Say you have > > // PR c++/55408 > > struct foo { >template >void bar(); > }; > > template > void foo::bar() {} > > int main() > { >extern int i; >foo {}.bar<&i>(); > } > > which we wrongly accept.

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

On Wed, Aug 5, 2020 at 11:53 AM Richard Biener wrote: > > On August 5, 2020 4:45:00 PM GMT+02:00, "H.J. Lu" wrote: > >On Wed, Aug 5, 2020 at 5:34 AM H.J. Lu wrote: > >> > >> On Wed, Aug 5, 2020 at 5:31 AM Richard Biener > >wrote: > >> > > >> > On Wed, 5 Aug 2020, H.J. Lu wrote: > >> > > >> > >

[PATCH] rs6000: Don't ICE when spilling an MMA accumulator

The following patch fixes one of the bugs discovered in PR96466, namely when we spill an accumulator that has a known zero value. In that case, LRA would emit a new (set (reg:PXI ...) 0) insn, but it would not use the mma_xxsetaccz pattern to do it. The solution is to move the xxsetaccz instructi

Re: [patch, fortran] Compile-time check for change in DO variable in contained procedures

Hi Paul, I must say that I was thinking rather more of the INTENT(IN) case to make sure that it is accepted. Ah, I misunderstood that. You're right - also check legal code :-) I've committed the attached test case as obvious (after verifying that it passes. It checks against functions and su

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

On August 5, 2020 4:45:00 PM GMT+02:00, "H.J. Lu" wrote: >On Wed, Aug 5, 2020 at 5:34 AM H.J. Lu wrote: >> >> On Wed, Aug 5, 2020 at 5:31 AM Richard Biener >wrote: >> > >> > On Wed, 5 Aug 2020, H.J. Lu wrote: >> > >> > > On Wed, Aug 5, 2020 at 12:06 AM Richard Biener > wrote: >> > > > >> > > > O

Re: [PATCH] c++: cxx_eval_vec_init after zero initialization [PR96282]

On 8/4/20 2:31 PM, Patrick Palka wrote: On Tue, 4 Aug 2020, Jason Merrill wrote: On 8/4/20 9:45 AM, Patrick Palka wrote: On Mon, 3 Aug 2020, Patrick Palka wrote: On Mon, 3 Aug 2020, Jason Merrill wrote: On 8/3/20 2:45 PM, Patrick Palka wrote: On Mon, 3 Aug 2020, Jason Merrill wrote: On

FENV_ACCESS status

Hello, I updated the patch discussed in https://patchwork.ozlabs.org/project/gcc/patch/alpine.deb.2.02.1906221743430.16...@grove.saclay.inria.fr/ and pushed it as something like refs/users/glisse/heads/fenv (first user branch in gcc's git, I hope it worked). I am also attaching the diff here.

Re: std:vec for classes with constructor? (Was: Re: [patch] multi-range implementation for value_range (irange))

On August 5, 2020 5:41:01 PM GMT+02:00, Aldy Hernandez via Gcc-patches wrote: >On 8/5/20 5:09 PM, Martin Jambor wrote: > >> On Fri, Jul 31 2020, Aldy Hernandez via Gcc-patches wrote: >>> >> >> [...] >> >>> >>> * ipa-cp changes from vec to std::vec. >>> >>> We are using std::vec to ensure constr

Re: std:vec for classes with constructor? (Was: Re: [patch] multi-range implementation for value_range (irange))

On August 5, 2020 5:09:19 PM GMT+02:00, Martin Jambor wrote: >On Fri, Jul 31 2020, Aldy Hernandez via Gcc-patches wrote: >> > >[...] > >> >> * ipa-cp changes from vec to std::vec. >> >> We are using std::vec to ensure constructors are run, which they >aren't >> in our internal vec<> implementatio

Re: [patch, fortran] Compile-time check for change in DO variable in contained procedures

I must say that I was thinking rather more of the INTENT(IN) case to make sure that it is accepted. Paul On Wed, 5 Aug 2020 at 17:41, Thomas Koenig wrote: > Hi Paul, > > > This is OK by me. > > Committed (or should I say "pushed"?), thanks! > > > Is it worth testing the INTENT variants? > > I

Re: [patch, fortran] Compile-time check for change in DO variable in contained procedures

Hi Paul, This is OK by me. Committed (or should I say "pushed"?), thanks! Is it worth testing the INTENT variants? I added a test for INTENT(INOUT), here's the version of the test case that was committed. Best regards Thomas program main implicit none integer :: i1, i2, i3, i

Re: [patch] multi-range implementation for value_range (irange)

On 8/5/20 4:27 PM, Gerald Pfeifer wrote: Hi Aldy, On Fri, 31 Jul 2020, Aldy Hernandez via Gcc-patches wrote: Jeff approved this patch off-list. I will re-run tests once again and commit by Monday. I believe this has broken the bootstrap with clang (specifically FreeBSD clang version 10.0.

Re: std:vec for classes with constructor? (Was: Re: [patch] multi-range implementation for value_range (irange))

On 8/5/20 5:09 PM, Martin Jambor wrote: On Fri, Jul 31 2020, Aldy Hernandez via Gcc-patches wrote: [...] * ipa-cp changes from vec to std::vec. We are using std::vec to ensure constructors are run, which they aren't in our internal vec<> implementation. Although we usually steer away fr

Re: [Patch, fortran] PR96102 - ICE in check_host_association, at fortran/resolve.c:5994

On Wed, Aug 05, 2020 at 03:59:38PM +0100, Paul Richard Thomas wrote: > The attached patch builds on a draft posted by Steve Kargl. I have left the > gcc_assert in place just in case my imagination was too limited to generate > an ICE. > > Regtests OK on FC31/x86_64 - OK for trunk? > Looks OK to

RE: [PATCH V2] aarch64: Use Q-reg loads/stores in movmem expansion

Hi Richard Thank you for fixing this. I apologise for the trouble. I ran bootstrap only on an earlier version of the patch where I should have ran it again on the final one! ☹ I will be more careful in the future, Thanks Sudi > -Original Message- > From: Richard Sandiford > Sent: 05

Re: [patch, fortran] Compile-time check for change in DO variable in contained procedures

Hi Thomas, This is OK by me. Is it worth testing the INTENT variants? Cheers Paul On Tue, 4 Aug 2020 at 20:03, Thomas Koenig via Fortran wrote: > Hello world, > > the attached patch issues an error for something that I am sure most > people did at least once (I know I did), something like >

std:vec for classes with constructor? (Was: Re: [patch] multi-range implementation for value_range (irange))

On Fri, Jul 31 2020, Aldy Hernandez via Gcc-patches wrote: > [...] > > * ipa-cp changes from vec to std::vec. > > We are using std::vec to ensure constructors are run, which they aren't > in our internal vec<> implementation. Although we usually steer away > from using std::vec because of inte

Re: RFC: Monitoring old PRs, new dg directives

On 8/4/20 8:54 PM, Marek Polacek via Gcc-patches wrote: On Tue, Aug 04, 2020 at 03:33:23PM -0700, Mike Stump wrote: I think the read of the room is that people think it would be generally useful, so let approve the general plan. Cool. So, now we are down to the fine details. Please do see

[Patch, fortran] PR96102 - ICE in check_host_association, at fortran/resolve.c:5994

The attached patch builds on a draft posted by Steve Kargl. I have left the gcc_assert in place just in case my imagination was too limited to generate an ICE. Regtests OK on FC31/x86_64 - OK for trunk? Paul Change.Logs Description: Binary data diff --git a/gcc/fortran/resolve.c b/gcc/fortran/r

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

> On Aug 5, 2020, at 9:45 AM, H.J. Lu wrote: > > On Wed, Aug 5, 2020 at 5:34 AM H.J. Lu > wrote: >> >> On Wed, Aug 5, 2020 at 5:31 AM Richard Biener wrote: >>> >>> >>> [PATCH] Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all] >>

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

On Wed, Aug 5, 2020 at 5:34 AM H.J. Lu wrote: > > On Wed, Aug 5, 2020 at 5:31 AM Richard Biener wrote: > > > > On Wed, 5 Aug 2020, H.J. Lu wrote: > > > > > On Wed, Aug 5, 2020 at 12:06 AM Richard Biener wrote: > > > > > > > > On Tue, 4 Aug 2020, H.J. Lu wrote: > > > > > > > > > On Tue, Aug 4, 20

[PATCH] arm: Clear canary value after stack_protect_test [PR96191]

The stack_protect_test patterns were leaving the canary value in the temporary register, meaning that it was often still in registers on return from the function. An attacker might therefore have been able to use it to defeat stack-smash protection for a later function. Tested on arm-linux-gnueab

Re: [patch] multi-range implementation for value_range (irange)

Hi Aldy, On Fri, 31 Jul 2020, Aldy Hernandez via Gcc-patches wrote: > Jeff approved this patch off-list. I will re-run tests once again and > commit by Monday. I believe this has broken the bootstrap with clang (specifically FreeBSD clang version 10.0.0): In file included from /scratch/tmp/ger

Re: VEC_COND_EXPR optimizations v2

On Wed, Aug 5, 2020 at 3:33 PM Marc Glisse wrote: > > New version that passed bootstrap+regtest during the night. > > When vector comparisons were forced to use vec_cond_expr, we lost a number of > optimizations (my fault for not adding enough testcases to prevent that). > This patch tries to unwr

Re: [PATCH] vect: Try smaller vector size when SLP split fails

On Wed, Aug 5, 2020 at 3:30 PM Andrew Stubbs wrote: > > This patch improves SLP performance in combination with some patches I > have in development to add multiple vector sizes to amdgcn. > > The problem is that amdgcn's preferred vector size has 64 lanes, and SLP > does not support lane masking.

[committed] aarch64: Clear canary value after stack_protect_test [PR96191]

The stack_protect_test patterns were leaving the canary value in the temporary register, meaning that it was often still in registers on return from the function. An attacker might therefore have been able to use it to defeat stack-smash protection for a later function. Tested on aarch64-linux-gn

Re: [PATCH v5] vect/rs6000: Support vector with length cost modeling

On Wed, Aug 05, 2020 at 08:27:57AM +0100, Richard Sandiford wrote: > OK for the vectoriser parts with those changes, thanks. The rs6000 part is still fine as well. Thanks! Segher

Re: [PATCH V2] aarch64: Use Q-reg loads/stores in movmem expansion

Andreas Schwab writes: > This breaks bootstrap. I've pushed the below to fix this after bootstrapping & regression testing on aarch64-linux-gnu. Richard >From 4af98a21e10547679a643eed85d51aa5d7d2510b Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Wed, 5 Aug 2020 12:56:41 +0100 Subject:

VEC_COND_EXPR optimizations v2

New version that passed bootstrap+regtest during the night. When vector comparisons were forced to use vec_cond_expr, we lost a number of optimizations (my fault for not adding enough testcases to prevent that). This patch tries to unwrap vec_cond_expr a bit so some optimizations can still hap

[PATCH] vect: Try smaller vector size when SLP split fails

This patch improves SLP performance in combination with some patches I have in development to add multiple vector sizes to amdgcn. The problem is that amdgcn's preferred vector size has 64 lanes, and SLP does not support lane masking. My patches will add smaller vector sizes (32, 16, 8, 4, 2)

[PATCH] emit-rtl.c: Allow vector subreg of float vectors

This patch is a prerequisite for some patches I have to add multiple vector sizes on amdgcn. The problem is that validate_subreg rejects things like this: (subreg:V32SF (reg:V64SF) 0) These are commonly generated by the compiler. The integer equivalents work fine. To be honest, I don't kn

Re: RFC: Monitoring old PRs, new dg directives

On Wed, Aug 05, 2020 at 08:58:40AM +0100, Richard Sandiford wrote: > Marek Polacek via Gcc-patches writes: > > On Thu, Jul 30, 2020 at 11:54:23AM +0200, Jakub Jelinek via Gcc-patches > > wrote: > >> On Tue, Jul 28, 2020 at 05:44:47PM -0400, Marek Polacek via Gcc-patches > >> wrote: > >> > We wil

Re: RFC: Monitoring old PRs, new dg directives

On Wed, Aug 05, 2020 at 09:04:53AM +0100, Richard Sandiford wrote: > Marek Polacek writes: > > On Wed, Jul 29, 2020 at 09:40:35AM +0100, Richard Sandiford wrote: > >> I guess there's a possibility that some tests happen to pass already > >> on some targets. That's more likely with middle-end and

Re: RFC: Monitoring old PRs, new dg directives

On Tue, Aug 04, 2020 at 03:45:11PM -0700, Mike Stump wrote: > On Aug 4, 2020, at 3:08 PM, Marek Polacek via Gcc-patches > wrote: > > > > That works well if you know where to expect an error. But if you don't, > > it's > > worse. E.g., > > > > // { dg-xfail-if "" { *-*-* } } > > int i = nothe

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

On Wed, Aug 5, 2020 at 5:31 AM Richard Biener wrote: > > On Wed, 5 Aug 2020, H.J. Lu wrote: > > > On Wed, Aug 5, 2020 at 12:06 AM Richard Biener wrote: > > > > > > On Tue, 4 Aug 2020, H.J. Lu wrote: > > > > > > > On Tue, Aug 4, 2020 at 12:35 AM Richard Biener > > > > wrote: > > > > > > > > > >

Re: [PATCH V2] aarch64: Use Q-reg loads/stores in movmem expansion

This breaks bootstrap. during RTL pass: final ../../gcc/timevar.c: In member function ‘void timer::push_internal(timer::timevar_def*)’: ../../gcc/timevar.c:373:1: internal compiler error: output_operand: invalid expression as operand 373 | } | ^ 0xbabdff output_operand_lossage(char const

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

On Wed, 5 Aug 2020, H.J. Lu wrote: > On Wed, Aug 5, 2020 at 12:06 AM Richard Biener wrote: > > > > On Tue, 4 Aug 2020, H.J. Lu wrote: > > > > > On Tue, Aug 4, 2020 at 12:35 AM Richard Biener wrote: > > > > > > > > On Mon, 3 Aug 2020, Qing Zhao wrote: > > > > > > > > > Hi, Uros, > > > > > > > > >

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

On Wed, Aug 5, 2020 at 12:06 AM Richard Biener wrote: > > On Tue, 4 Aug 2020, H.J. Lu wrote: > > > On Tue, Aug 4, 2020 at 12:35 AM Richard Biener wrote: > > > > > > On Mon, 3 Aug 2020, Qing Zhao wrote: > > > > > > > Hi, Uros, > > > > > > > > Thanks a lot for your review on X86 parts. > > > > > >

[PATCH] refactor LIM a bit

This refactors LIM to eschew alloc_aux_for_edges and re-uses the RPO order of the move_computations walk for invariantness computation as well. It also removes one unnecessary sorting (but retaining it as checking code because we bsearch the vector) and moves edge insert commit code to the place wh

RE: [PATCH 2/5][Arm] New pattern for CSINV instructions

Hi Kyrill, > -/* Only thumb1 can't support conditional execution, so return true if > - the target is not thumb1. */ > static bool > > > Functions should have comments in GCC. Can you please write something > describing the new logic of the function. > > arm_have_conditional_execution (void

[PATCH] Make genmatch transform failure handling more consistent

Currently whether a fail during the transform stage is fatal or whether following patterns are still considers is a bit random depending on whether the pattern is wrapped in a for for example. The follwing makes it consistent by replacing early returns with gotos to the end of the pattern processin

RE: [PATCH] aarch64: Add A64FX machine model

Hi Richard > Would you like the patch to be backported further than GCC 10? That is good if it could be backported to GCC9. > Does the attached patch to document the addition to GCC 10.3 look OK? To avoid misunderstanding, could you please remove "for a 512-bit vector length"? If there is anyth

[PATCH][GCC-10 Backport] arm: Enable no-writeback vldr.16/vstr.16.

From: Joe Ramsay Hi, There was previously no way to specify that a register operand cannot have any writeback modifiers, and as a result the argument to vldr.16 and vstr.16 could be erroneously output with post-increment. This change adds a constraint which forbids all writeback, and selects it

[PATCH] testsuite: Update some vect cases for partial vectors

Hi, This patch is to adjust some existing vectorization test cases to stay well with the newly introduced partial vector usages. Bootstrapped/regtested on aarch64-linux-gnu and powerpc64le-linux-gnu P9 (with explicit param vect-partial-vector-usage=1 and enablement on check_effective_target_vect_

Re: [PATCH] vect: Skip epilogue loops for dbgcnt check [PR96451]

On Wed, Aug 5, 2020 at 9:48 AM Kewen.Lin wrote: > > Hi, > > As the PR shows, commit r11-2453 exposed one issue that vectorizer > wants to vectorize the epilogue loop and leaves the if-cvt body there, > but later dbgcnt check disables it, the left scalar mask_store > statement cause ICE. > > As Ric

[committed] openmp: Handle even some combined non-rectangular loops

Hi! The number of loops computation and logical iteration -> actual iterator values computations can now be done separately even on composite constructs (though for triangular loops it would still be more efficient to propagate a few values through, will handle that incrementally). simd and tasklo

Re: [PATCH] Amend match.pd syntax with force-simplified results

On Wed, 5 Aug 2020, Richard Biener wrote: > On Tue, 4 Aug 2020, Marc Glisse wrote: > > > On Fri, 31 Jul 2020, Richard Biener wrote: > > > > > This adds a ! marker to result expressions that should simplify > > > (and if not fail the simplification). This can for example be > > > used like > > >

[committed] openmp: Handle reduction clauses on host teams construct [PR96459]

Hi! As the new testcase shows, we weren't actually performing reductions on host teams construct. And fixing that revealed a flaw in the for-14.c testcase. The problem is that the tests perform also initialization and checking around the calls to the functions with the OpenMP constructs. In tha

[committed] openmp: Use more efficient logical -> actual computation even if # iterations is computed at runtime

Hi! For triangular loops use more efficient logical iteration number to actual iterator values computation even for non-rectangular loops where number of loop iterations could not be computed at compile time. Bootstrapped/regtested on x86_64-linux and i686-linux, committed to trunk. 2020-08-05

RE: [PATCH 2/5][Arm] New pattern for CSINV instructions

Hi Omar, From: Omar Tahir Sent: 04 August 2020 17:12 To: Kyrylo Tkachov ; ni...@redhat.com; Ramana Radhakrishnan ; Richard Earnshaw ; gcc-patches@gcc.gnu.org Subject: [PATCH 2/5][Arm] New pattern for CSINV instructions This patch adds a new pattern, *thumb2_csinv, for generating CSINV nstruct

Re: RFC: Monitoring old PRs, new dg directives

Marek Polacek writes: > On Wed, Jul 29, 2020 at 09:40:35AM +0100, Richard Sandiford wrote: >> I guess there's a possibility that some tests happen to pass already >> on some targets. That's more likely with middle-end and backend bugs >> rather than frontend stuff though. Perhaps for those it wo

Re: RFC: Monitoring old PRs, new dg directives

Marek Polacek via Gcc-patches writes: > On Thu, Jul 30, 2020 at 11:54:23AM +0200, Jakub Jelinek via Gcc-patches wrote: >> On Tue, Jul 28, 2020 at 05:44:47PM -0400, Marek Polacek via Gcc-patches >> wrote: >> > We will still have a surfeit of bugs that we've given short shrift to, but >> > let's at

[PATCH] vect: Skip epilogue loops for dbgcnt check [PR96451]

Hi, As the PR shows, commit r11-2453 exposed one issue that vectorizer wants to vectorize the epilogue loop and leaves the if-cvt body there, but later dbgcnt check disables it, the left scalar mask_store statement cause ICE. As Richard pointed out in that PR, the dbgcnt is to count original scal

Re: [PATCH v5] vect/rs6000: Support vector with length cost modeling

"Kewen.Lin" writes: > diff --git a/gcc/tree-vect-loop-manip.c b/gcc/tree-vect-loop-manip.c > index 490e7befea3..2a0d3b1840d 100644 > --- a/gcc/tree-vect-loop-manip.c > +++ b/gcc/tree-vect-loop-manip.c > @@ -412,7 +412,10 @@ vect_maybe_permute_loop_masks (gimple_seq *seq, > rgroup_controls *dest_r

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

On Tue, 4 Aug 2020, H.J. Lu wrote: > On Tue, Aug 4, 2020 at 12:35 AM Richard Biener wrote: > > > > On Mon, 3 Aug 2020, Qing Zhao wrote: > > > > > Hi, Uros, > > > > > > Thanks a lot for your review on X86 parts. > > > > > > Hi, Richard, > > > > > > Could you please take a look at the middle-end pa

Re: [PATCH] Amend match.pd syntax with force-simplified results

On Tue, 4 Aug 2020, Marc Glisse wrote: > On Fri, 31 Jul 2020, Richard Biener wrote: > > > This adds a ! marker to result expressions that should simplify > > (and if not fail the simplification). This can for example be > > used like > > > > (simplify > > (plus (vec_cond:s @0 @1 @2) @3) > > (v