Re: [committed] wwwdocs: Update reference to RISC-V ISA Specifications

2020-08-23 Thread Kito Cheng via Gcc-patches
Hi Gerald: Thanks for your patch :) On Sun, Aug 23, 2020 at 6:19 PM Gerald Pfeifer wrote: > > Pushed. Gerald > > --- > htdocs/readings.html | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/htdocs/readings.html b/htdocs/readings.html > index b960eb8c..978d566c 100644 >

Re: [PATCH] x86: Only use general-purpose registers during CPUID check

2020-08-23 Thread Florian Weimer
* H. J. Lu via Gcc-patches: > 2. CPUID check should be done with general registers only. Is this really the concern here? Isn't this about instructions, not registers? If there's a useful integer register instruction for post-processing CPUID bits that's not in the baseline ABI, GCC still

Re: [PATCH] x86: Only use general-purpose registers during CPUID check

2020-08-23 Thread Uros Bizjak via Gcc-patches
On Sun, Aug 23, 2020 at 5:23 PM H.J. Lu wrote: > > On Sun, Aug 23, 2020 at 10:18:28AM +0200, Uros Bizjak wrote: > > On Sat, Aug 22, 2020 at 9:09 PM H.J. Lu wrote: > > > > > > > Compile CPUID check with "-mno-sse -mfpmath=387" to disable SSE, AVX > > > > > and > > > > > AVX512 during CPUID check

Re: [PATCH] x86: Add target("general-regs-only") function attribute

2020-08-23 Thread Uros Bizjak via Gcc-patches
On Sun, Aug 23, 2020 at 5:07 PM H.J. Lu wrote: > > On Sun, Aug 23, 2020 at 10:18:28AM +0200, Uros Bizjak wrote: > > On Sat, Aug 22, 2020 at 9:09 PM H.J. Lu wrote: > > > > > > > Compile CPUID check with "-mno-sse -mfpmath=387" to disable SSE, AVX > > > > > and > > > > > AVX512 during CPUID check

Re: [PATCH] x86: Only use general-purpose registers during CPUID check

2020-08-23 Thread H.J. Lu via Gcc-patches
On Sun, Aug 23, 2020 at 10:18:28AM +0200, Uros Bizjak wrote: > On Sat, Aug 22, 2020 at 9:09 PM H.J. Lu wrote: > > > > > Compile CPUID check with "-mno-sse -mfpmath=387" to disable SSE, AVX and > > > > AVX512 during CPUID check to avoid vector and mask register operations. > > > > > >

[PATCH] x86: Add target("general-regs-only") function attribute

2020-08-23 Thread H.J. Lu via Gcc-patches
On Sun, Aug 23, 2020 at 10:18:28AM +0200, Uros Bizjak wrote: > On Sat, Aug 22, 2020 at 9:09 PM H.J. Lu wrote: > > > > > Compile CPUID check with "-mno-sse -mfpmath=387" to disable SSE, AVX and > > > > AVX512 during CPUID check to avoid vector and mask register operations. > > > > > >

PING [PATCH] x86: Change CTZ_DEFINED_VALUE_AT_ZERO to return 0/2

2020-08-23 Thread H.J. Lu via Gcc-patches
On Mon, Jul 13, 2020 at 6:42 AM H.J. Lu wrote: > > Change CTZ_DEFINED_VALUE_AT_ZERO/CTZ_DEFINED_VALUE_AT_ZERO to return 0/2 > to enable table-based clz/ctz optimization: > > -- Macro: CLZ_DEFINED_VALUE_AT_ZERO (MODE, VALUE) > -- Macro: CTZ_DEFINED_VALUE_AT_ZERO (MODE, VALUE) > A C

[committed] wwwdocs: Update reference to RISC-V ISA Specifications

2020-08-23 Thread Gerald Pfeifer
Pushed. Gerald --- htdocs/readings.html | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/htdocs/readings.html b/htdocs/readings.html index b960eb8c..978d566c 100644 --- a/htdocs/readings.html +++ b/htdocs/readings.html @@ -263,7 +263,7 @@ names. riscv Manufacturer: Many

Re: [PATCH] x86: Only use general-purpose registers during CPUID check

2020-08-23 Thread Uros Bizjak via Gcc-patches
On Sat, Aug 22, 2020 at 9:09 PM H.J. Lu wrote: > > > Compile CPUID check with "-mno-sse -mfpmath=387" to disable SSE, AVX and > > > AVX512 during CPUID check to avoid vector and mask register operations. > > > > -mgeneral-regs-only ? > > > > Here is a patch to add target("general-regs-only")

[committed] [OG10] Fix patterns in Fortran tests for kernels loop annotation.

2020-08-23 Thread Sandra Loosemore
I've committed this relatively trivial patch to fix up some of the kernels loop annotation tests on the OG10 branch to match changes in the dump formatting. -Sandra commit 6d670e648e76fe44589a42ee458098ff84d24af1 Author: Sandra Loosemore Date: Sat Aug 22 22:43:57 2020 -0700 Fix