Hello Harald,
OK for master / backports?
OK. It is indeed fairly obvious, as you write.
Should the testcase be moved to the gomp/ subdirectory?
Yes. It's a compile-time test, and it will then only be run
if the the compiler can do OpenMP.
You will not need the
+! { dg-options
Hi:
GCC11 will be the system GCC 2 years from now, and for the
processors then, they shouldn't even need to split a 256-bit vector
into 2 128-bits vectors.
.i.e. Test SPEC2017 with the below 2 options on Zen3/ICL show
option B is better than Option A.
Option A:
-march=x86-64 -mtune=generic
On Jan 27, 2021, Richard Biener wrote:
> That said, rather than not transforming the loop as you do I'd
> say we want to re-inline small copies more forcefully during
> loop distribution code-gen so we turn a loop that sets
> 3 'short int' to zero into a 'int' store and a 'short' store for
Hi!
On Thu, Dec 10, 2020 at 08:41:11PM -0600, acsaw...@linux.ibm.com wrote:
> This patch adds a new function to genfusion.pl to generate patterns for
> logical-logical fusion. They are enabled by default for power10 and can
> be disabled by -mno-power10-fusion-2logical or -mno-power10-fusion.
>
Hi Sebastian:
Thank for report this issue, I can reproduce that, I'll investigate what
happened today :)
Sebastian Huber 於 2021年1月26日 週二 14:13
寫道：
> Hello Kito,
>
> On 20/11/2020 09:33, Kito Cheng wrote:
> > - Define MULTILIB_DEFAULTS can reduce the total number of multilib if
> > the
On Wed, 2021-01-27 at 19:43 -0600, Segher Boessenkool wrote:
> On Wed, Jan 27, 2021 at 01:06:46PM -0600, will schmidt wrote:
> > On Thu, 2021-01-14 at 11:59 -0500, Michael Meissner via Gcc-patches
> > wrote:
> > > November 19th, 2020:
> > > Message-ID:
Thanks! committed to master :)
On Wed, Jan 27, 2021 at 1:58 PM Xing GUO via Gcc-patches
wrote:
>
> Sorry, I forgot to remove the line '*explicit_version_p = true;' in my
> previous patch.
>
> This is an updated patch.
>
> Thanks!
>
> ---
> gcc/ChangeLog:
>
> *
On Wed, 2021-01-27 at 18:24 -0600, Segher Boessenkool wrote:
> Hi!
>
> On Mon, Oct 26, 2020 at 04:22:32PM -0500, will schmidt wrote:
> > Per PR91903, GCC ICEs when we attempt to pass a variable
> > (or out of range value) into the vec_ctf() builtin. Per
> > investigation, the parameter
On Tue, Jan 26, 2021 at 06:43:06PM -0500, Michael Meissner wrote:
> I posted this patch on January 14th, 2021:
> https://gcc.gnu.org/pipermail/gcc-patches/2021-January/563498.html
>
> | Date: Thu, 14 Jan 2021 12:09:36 -0500
> | Subject: [PATCH] PowerPC: Add float128/Decimal conversions.
> |
Whoops, I thought I was replying to the second patch about Decimal and IEEE
128-bit conversion, not about built-in support.
On Wed, Jan 27, 2021 at 10:01:38PM -0500, Michael Meissner wrote:
> On Wed, Jan 27, 2021 at 07:43:56PM -0600, Segher Boessenkool wrote:
> > On Wed, Jan 27, 2021 at
On Wed, Jan 27, 2021 at 07:43:56PM -0600, Segher Boessenkool wrote:
> On Wed, Jan 27, 2021 at 01:06:46PM -0600, will schmidt wrote:
> > On Thu, 2021-01-14 at 11:59 -0500, Michael Meissner via Gcc-patches wrote:
> > > November 19th, 2020:
> > > Message-ID:
Hi,
As described in commit message, we need to avoid computing niters info for fake
edges. This simple patch does this by two changes.
Bootstrap and test on X86_64, is it ok?
Thanks,
bin
pr97627-20210128.patch
Description: Binary data
On Wed, Jan 27, 2021 at 01:06:46PM -0600, will schmidt wrote:
> On Thu, 2021-01-14 at 11:59 -0500, Michael Meissner via Gcc-patches wrote:
> > November 19th, 2020:
> > Message-ID: <20201119235814.ga...@ibm-toto.the-meissners.org>
>
> Subject and date should be sufficient
Only if people pick good
On Tue, Jan 26, 2021 at 06:39:22PM -0500, Michael Meissner wrote:
> Ping https://gcc.gnu.org/pipermail/gcc-patches/2021-January/563496.html
>
> | Date: Thu, 14 Jan 2021 11:59:19 -0500
> | Subject: [PATCH] PowerPC: Map IEEE 128-bit long double built-ins.
> | Message-ID:
On Tue, Jan 19, 2021 at 12:24:51PM -0500, Michael Meissner wrote:
> On Fri, Jan 15, 2021 at 03:43:13PM -0600, Segher Boessenkool wrote:
> > Hi!
> >
> > On Thu, Jan 14, 2021 at 11:59:19AM -0500, Michael Meissner wrote:
> > > >From 78435dee177447080434cdc08fc76b1029c7f576 Mon Sep 17 00:00:00 2001
>
Attached is an updated patch for both tree.h and the internals manual
documenting the most important BLOCK_ macros and what they represent.
On 1/21/21 2:52 PM, Martin Sebor wrote:
On 1/18/21 6:25 AM, Richard Biener wrote:
PS Here are my notes on the macros and the two related functions:
Hi!
On Mon, Oct 26, 2020 at 04:22:32PM -0500, will schmidt wrote:
> Per PR91903, GCC ICEs when we attempt to pass a variable
> (or out of range value) into the vec_ctf() builtin. Per
> investigation, the parameter checking exists for this
> builtin with the int types, but was missing for
> the
On 1/27/21 3:32 PM, Jakub Jelinek wrote:
On Sun, Oct 21, 2018 at 04:39:30PM -0400, Ed Smith-Rowland wrote:
This patch implements C++2a proposal P0330R2 Literal Suffixes for ptrdiff_t
and size_t*. It's not official yet but looks very likely to pass. It is
incomplete because I'm looking for
Attached is another attempt to fix the problem caused by allowing
front-end trees representing nontrivial VLA bound expressions to
stay in attribute access attached to functions. Since removing
these trees seems to be everyone's preference this patch does that
by extending the free_lang_data
Hi Harris!
OK for master? I do not have write access, so someone will need to
commit this for me.
Reviewed, regression-tested and committed as
https://gcc.gnu.org/g:1cdca4261e88f4dc9c3293c6b3c2fff3071ca32b
Thanks for your patch, and welcome aboard!
Best regards
Thomas
Dear all,
the fix for this ICE is obvious: make gfc_call_malloc behave as documented.
Apparently the special case in question was not exercised in the testsuite.
Regtested on x86_64-pc-linux-gnu.
OK for master / backports?
Should the testcase be moved to the gomp/ subdirectory?
Thanks,
Harald
(re-sending with subject line tags)
Hi all,
Now that my copyright assignment is complete, I'm submitting this fix.
Test cases are included.
OK for master? I do not have write access, so someone will need to
commit this for me.
Regards,
Harris
libgfortran/ChangeLog:
*
>From 02b04aed77130f2ec9156d2f7ff89d4cc6b5a78b Mon Sep 17 00:00:00 2001
From: Michael Meissner
Date: Thu, 21 Jan 2021 12:58:56 -0500
Subject: [PATCH, revised] PowerPC: Add float128/Decimal conversions.
[PATCH, revised] PowerPC: Add float128/Decimal conversions.
Unfortunately, the revision I
[PATCH, revised] PowerPC: Add float128/Decimal conversions.
This patch revises the patch on January 14th. The only change in this patch
compared to the previous patch is to change the format string for converting
IEEE 128-bit to string. This allows the c-c++-common/dfp/convert-bfp-6.c test
now
The patch solves the following problem:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97684
The patch was successfully bootstrapped and tested on x86-64.
commit 238ea13cca75ad499f227b60a95c40174c6caf78
Author: Vladimir N. Makarov
Date: Wed Jan 27 14:53:28 2021 -0500
[PR97684] IRA:
On Wed, Jan 27, 2021 at 01:06:46PM -0600, will schmidt wrote:
> On Thu, 2021-01-14 at 11:59 -0500, Michael Meissner via Gcc-patches wrote:
> > From 78435dee177447080434cdc08fc76b1029c7f576 Mon Sep 17 00:00:00 2001
> > From: Michael Meissner
> > Date: Wed, 13 Jan 2021 21:47:03 -0500
> > Subject:
This patch is okay with the removal of
{ target powerpc*-*-* }
from the pr79251-run.c testcase directives.
As I explained in the earlier email, I still believe that the testcase
is not testing what you intend, but this patch is a definite
improvement and removes the failures. We can correct
From: yaozhongxiao
find_first_set and find_last_set method is not optimal for neon,
it need to be improved by synthesized with horizontal adds(vaddv)
which will reduce the generated assembly code; in the following cases,
vaddvq_s16 will generate 2 instructions but vpadd_s16 will generate 4
From: Matthias Kretz
This is necessary to avoid failures resulting from PR98834.
libstdc++-v3/ChangeLog:
* testsuite/Makefile.am: Warn about the workaround. Add
-fno-tree-vrp to CXXFLAGS passed to the check_simd script.
Improve initial user feedback from make check-simd.
From: Matthias Kretz
From 9.7.4 in Parallelism TS 2. For some reason I overlooked these two
functions. Implement them via call to _S_reduce.
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd.h: Add __detail::_Minimum and
__detail::_Maximum to use them as _BinaryOperation
From: Matthias Kretz
In many failure cases it is helpful to inspect the instructions leading
up to the test failure. After this change the location is easier to find
and the branch after failure is easier to find.
libstdc++-v3/ChangeLog:
* testsuite/experimental/simd/tests/bits/verify.h
From: Matthias Kretz
libstdc++-v3/ChangeLog:
* testsuite/experimental/simd/driver.sh: Abstract reading test
options into read_src_option function. Read skip, only,
expensive, and xfail via read_src_option. Add timeout and
timeout-factor options and adjust timeout
From: Matthias Kretz
Handle overly large output by aborting the log and thus the test. This
is a similar condition to a timeout.
libstdc++-v3/ChangeLog:
* testsuite/experimental/simd/driver.sh: When handling the pipe
to log (and on verbose to stdout) count the lines. If it
From: Matthias Kretz
std::hypot(a, b, c) is imprecise and makes this test fail even though
the failure is unrelated to simd.
libstdc++-v3/ChangeLog:
* testsuite/experimental/simd/tests/hypot3_fma.cc: Add skip:
markup for long double on powerpc64*.
---
From: Matthias Kretz
POWER7 does not support __vector long long reductions, making the
generic _S_popcount implementation ill-formed. Specializing _S_popcount
for PPC allows optimization and avoids the issue.
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd.h: Add
From: Matthias Kretz
libstdc++-v3/ChangeLog:
* testsuite/experimental/simd/driver.sh: Remove executable on
SIGINT. Process compiler and test executable output: In verbose
mode print messages immediately, limited to 1000 lines and
breaking long lines to below
From: Matthias Kretz
libstdc++-v3/ChangeLog:
* testsuite/Makefile.am: Ensure .simd.summary is empty before
collecting a new summary.
* testsuite/Makefile.in: Regenerate.
---
libstdc++-v3/testsuite/Makefile.am | 1 +
libstdc++-v3/testsuite/Makefile.in | 1 +
2 files
From: Matthias Kretz
libstdc++-v3/ChangeLog:
* testsuite/experimental/simd/driver.sh (verify_test): Print
test output on run xfail. Do not repeat lines from the log that
were already printed on stdout.
(test_selector): Make the compiler flags pattern usable as a
From: Matthias Kretz
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd.h: Remove unnecessary static
assertion. Allow sizeof(8) integer __intrinsic_type to enable
the necessary mask type.
---
libstdc++-v3/include/experimental/bits/simd.h | 6 --
1 file changed,
From: Matthias Kretz
libstdc++-v3/ChangeLog:
* testsuite/experimental/simd/generate_makefile.sh: Use
different variables internally than documented for user
overrides. This makes internal append/prepend work as intended.
---
From: Matthias Kretz
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd.h: Let __intrinsic_type be valid if sizeof(long double) == sizeof(double) and
use a __vector double as member type.
---
libstdc++-v3/include/experimental/bits/simd.h | 11 ---
1 file changed, 8
From: Matthias Kretz
Intrinsics types for NEON differ from gnu::vector_size types now. This
requires explicit specializations for __intrinsic_type and a new
__is_intrinsic_type trait.
libstdc++-v3/ChangeLog:
* include/experimental/bits/simd.h (__is_intrinsic_type): New
internal
From: Matthias Kretz
libstdc++-v3/ChangeLog:
* testsuite/experimental/simd/driver.sh: Implement skip, only,
expensive, and xfail markers. They can select on type, ABI tag
subset number, target-triplet, and compiler flags.
*
As promised on IRC ...
Matthias Kretz (15):
Support skip, only, expensive, and xfail markers
Fix NEON intrinsic types usage
Support -mlong-double-64 on PPC
Fix simd_mask on POWER w/o POWER8
Fix several check-simd interaction issues
Fix DRIVEROPTS and TESTFLAGS processing
Fix
On Sun, Oct 21, 2018 at 04:39:30PM -0400, Ed Smith-Rowland wrote:
> This patch implements C++2a proposal P0330R2 Literal Suffixes for ptrdiff_t
> and size_t*. It's not official yet but looks very likely to pass. It is
> incomplete because I'm looking for some opinions. 9We also might wait 'till
The handling of dependent scopes and unsuitable scopes in lookup_using_decl
was a bit convoluted; I tweaked it for a while and then eventually
reorganized much of the function to hopefully be clearer. Along the way I
noticed a couple of ways we were mishandling inherited constructors.
The local
Ping!
Thanks
-Will
On Mon, 2021-01-04 at 18:03 -0600, will schmidt via Gcc-patches wrote:
> On Mon, 2020-10-26 at 16:22 -0500, will schmidt wrote:
> > [PATCH, rs6000] improve vec_ctf invalid parameter handling.
> >
> > Hi,
> > Per PR91903, GCC ICEs when we attempt to pass a variable
> >
Hi all,
Now that my copyright assignment is complete, I'm submitting this fix.
Test cases are included.
OK for master? I do not have write access, so someone will need to
commit this for me.
Regards,
Harris
libgfortran/ChangeLog:
* runtime/ISO_Fortran_binding.c (CFI_establish): fixed
> -Original Message-
> From: Jakub Jelinek
> Sent: 27 January 2021 19:11
> To: Richard Earnshaw ; Richard Sandiford
> ; Marcus Shawcroft
> ; Kyrylo Tkachov
> Cc: gcc-patches@gcc.gnu.org
> Subject: [PATCH] aarch64: Fix up *aarch64_bfxilsi_uxtw [PR98853]
>
> Hi!
>
> The
v1: https://gcc.gnu.org/pipermail/gcc-patches/2021-January/563799.html
v1 -> v2: Handle constraint modifiers, use AR constraint instead of R,
add testcases for & and %.
After switching the s390 backend to store long doubles in vector
registers, "f" constraint broke when used with the former:
Hi!
The https://gcc.gnu.org/legacy-ml/gcc-patches/2018-07/msg01895.html
patch that introduced this pattern claimed:
Would generate:
combine_balanced_int:
bfxil w0, w1, 0, 16
uxtwx0, w0
ret
But with this patch generates:
combine_balanced_int:
bfxil w0,
On Thu, 2021-01-14 at 11:59 -0500, Michael Meissner via Gcc-patches wrote:
> From 78435dee177447080434cdc08fc76b1029c7f576 Mon Sep 17 00:00:00 2001
> From: Michael Meissner
> Date: Wed, 13 Jan 2021 21:47:03 -0500
> Subject: [PATCH] PowerPC: Map IEEE 128-bit long double built-ins.
>
> This patch
On 27/01/21 17:54 +, Jonathan Wakely wrote:
and add something to the release notes too.
Also done. Pushed to wwwdocs.
commit f948177c3d01d09cbc8035a75583d425a4dca46e
Author: Jonathan Wakely
Date: Wed Jan 27 18:30:00 2021 +
Document simd additions to libstdc++
diff --git
On 27/01/21 16:45 +, Jonathan Wakely wrote:
I'll regen the docs [...]
Done. Regenerating the docs needed the attached fix.
commit 3670dbe49059ab1746ac2e3b77940160c05db6c2
Author: Jonathan Wakely
Date: Wed Jan 27 17:52:27 2021
libstdc++: Regenerate libstdc++ HTML docs
Kyrylo Tkachov writes:
> Hi Jonathan,
>
>> -Original Message-
>> From: Jonathan Wright
>> Sent: 27 January 2021 16:03
>> To: gcc-patches@gcc.gnu.org
>> Cc: Kyrylo Tkachov
>> Subject: [PATCH] aarch64: Use GCC vector extensions for FP ml[as]_n
>> intrinsics
>>
>> Hi,
>>
>> As subject,
> -Original Message-
> From: Jonathan Wright
> Sent: 27 January 2021 16:28
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov
> Subject: [PATCH] aarch64: Use RTL builtins for [su]mlal intrinsics
>
> Hi,
>
> As subject, this patch rewrites [su]mlal Neon intrinsics to use RTL
>
On 18/12/20 16:49 +0100, Matthias Kretz wrote:
Resending squashed patch after addressing Jonathan's comments.
From: Matthias Kretz
Add a new check-simd target to the testsuite. The new target creates a
subdirectory, generates the necessary Makefiles, and spawns submakes to
build and run the
On Wed, Jan 27, 2021 at 05:37:54PM +0100, Richard Biener wrote:
> Sure, more micro-optimizing is possible, including passing a flag
> to canon_true_dependence whether the addr RTX already had get_addr
> called on it. And pass in the offset as poly-rtx-int and make
> get_addr apply it if not zero.
On 18/12/20 16:49 +0100, Matthias Kretz wrote:
Resending this patch with proper commit message and rebased on master.
From: Matthias Kretz
Adds .
This implements the simd and simd_mask class templates via
[[gnu::vector_size(N)]] data members. It implements overloads for all of
for simd.
On Wed, 27 Jan 2021, Jakub Jelinek wrote:
> On Wed, Jan 27, 2021 at 04:16:22PM +0100, Richard Biener wrote:
> > I can check but all immediate first uses of mem_addr are in
> > true_dependece_1 which does x_addr = get_addr (x_addr); as the
> > first thing on it. So the concern would be that
> >
Hi,
As subject, this patch rewrites [su]mlal Neon intrinsics to use RTL
builtins rather than inline assembly code, allowing for better
scheduling and optimization.
Regression tested and bootstrapped on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
gcc/ChangeLog:
Hi Jonathan,
> -Original Message-
> From: Jonathan Wright
> Sent: 27 January 2021 16:03
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov
> Subject: [PATCH] aarch64: Use GCC vector extensions for FP ml[as]_n
> intrinsics
>
> Hi,
>
> As subject, this patch rewrites floating-point
Hi,
As subject, this patch rewrites floating-point mla_n/mls_n intrinsics to use
a + b * c / a - b * c rather than inline assembly code, allowing for better
scheduling and optimization.
Regression tested and bootstrapped on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
On Wed, Jan 27, 2021 at 04:16:22PM +0100, Richard Biener wrote:
> I can check but all immediate first uses of mem_addr are in
> true_dependece_1 which does x_addr = get_addr (x_addr); as the
> first thing on it. So the concern would be that
> get_addr (get_addr (x_addr)) != get_addr (x_addr)
On Tue, Jan 26, 2021 at 10:56 PM Xionghu Luo wrote:
>
> Hi,
>
> On 2021/1/27 03:00, David Edelsohn wrote:
> > On Tue, Jan 26, 2021 at 2:46 AM Xionghu Luo wrote:
> >>
> >> From: "luo...@cn.ibm.com"
> >>
> >> UNSPEC_SI_FROM_SF is not supported when TARGET_DIRECT_MOVE_64BIT
> >> is false for -m32,
On Wed, 27 Jan 2021, Jakub Jelinek wrote:
> On Wed, Jan 27, 2021 at 03:40:38PM +0100, Richard Biener wrote:
> > The following avoids repeatedly turning VALUE RTXen into
> > sth useful and re-applying a constant offset through get_addr
> > via DSE check_mem_read_rtx. Instead perform this once for
On Wed, Jan 27, 2021 at 2:18 PM Alexandre Oliva wrote:
>
>
> This patch attempts to fix a libgcc codegen regression introduced in
> gcc-10, as -ftree-loop-distribute-patterns was enabled at -O2.
>
>
> The ldist pass turns even very short loops into memset calls. E.g.,
> the TFmode emulation
> -Original Message-
> From: Jonathan Wright
> Sent: 27 January 2021 15:08
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov
> Subject: aarch64: Use RTL builtins for integer mls_n intrinsics
>
> Hi,
>
> As subject, this patch rewrites integer mls_n Neon intrinsics to use RTL
>
Hi,
As subject, this patch rewrites integer mls_n Neon intrinsics to use RTL
builtins rather than inline assembly code, allowing for better scheduling
and optimization.
Regression tested and bootstrapped on aarch64-none-linux-gnu - no
issues.
Ok for master?
Thanks,
Jonathan
---
On Wed, Jan 27, 2021 at 1:29 PM Alexandre Oliva wrote:
>
> On Jan 26, 2021, Richard Biener wrote:
>
> > So while I think it's safe let's look at if we can improve tree-nested.c,
> > like I see (probably not the correct place):
>
> *nod*, it's just not the *only* place.
>
> > seeing how we adjust
From: Jonathan Wright
Sent: 27 January 2021 12:57
To: Richard Sandiford ; Kyrylo Tkachov
Cc: gcc-patches@gcc.gnu.org; Richard Earnshaw
Subject: Re: [PATCH] aarch64: Use GCC vector extensions for integer mls
intrinsics
I have re-written this to use RTL builtins - regression tested and
On Wed, Jan 27, 2021 at 03:40:38PM +0100, Richard Biener wrote:
> The following avoids repeatedly turning VALUE RTXen into
> sth useful and re-applying a constant offset through get_addr
> via DSE check_mem_read_rtx. Instead perform this once for
> all stores to be visited in check_mem_read_rtx.
This avoids cases of PHI node vectorization that just causes us
to insert vector CTORs inside loops for values only required
outside of the loop.
Bootstrap and regtest running on x86_64-unknown-linux-gnu.
2021-01-27 Richard Biener
PR tree-optimization/98854
* tree-vect-slp.c
> * There are minor formatting issues:
>
> Should the linebreak in the extern inline definitions of strtof_l be
> after the return type, not before, matching GNU coding standards? It
> may well be that the C++ style is different, though.
>
> Unrelated whitespace changes in
The following avoids repeatedly turning VALUE RTXen into
sth useful and re-applying a constant offset through get_addr
via DSE check_mem_read_rtx. Instead perform this once for
all stores to be visited in check_mem_read_rtx. This avoids
allocating 1.6GB of garbage PLUS RTXen on the PR80960
Hi Clement,
> Here is a better version of the patch.
> All tests are on Linux are passing. Few have been disabled as
> they are working only with GNU model.
> For AIX, few failures remains. I haven't XFAIL them yet, as I
> want to know if they AIX only or related to the model itself.
>
> A
> -Original Message-
> From: Christophe Lyon
> Sent: 27 January 2021 13:56
> To: Kyrylo Tkachov
> Cc: Kyrylo Tkachov via Gcc-patches
> Subject: Re: arm: Adjust cost of vector of constant zero
>
> On Wed, 27 Jan 2021 at 14:44, Kyrylo Tkachov
> wrote:
> >
> >
> >
> > > -Original
On Wed, 27 Jan 2021 at 14:44, Kyrylo Tkachov wrote:
>
>
>
> > -Original Message-
> > From: Christophe Lyon
> > Sent: 27 January 2021 13:12
> > To: Kyrylo Tkachov
> > Cc: Kyrylo Tkachov via Gcc-patches
> > Subject: Re: arm: Adjust cost of vector of constant zero
> >
> > On Wed, 27 Jan
This reuses the code from std::string::find, which was improved by
r244225, but string_view was not changed to match.
libstdc++-v3/ChangeLog:
PR libstdc++/66414
* include/bits/string_view.tcc
(basic_string_view::find(const CharT*, size_type, size_type)):
Optimize.
> -Original Message-
> From: Christophe Lyon
> Sent: 27 January 2021 13:12
> To: Kyrylo Tkachov
> Cc: Kyrylo Tkachov via Gcc-patches
> Subject: Re: arm: Adjust cost of vector of constant zero
>
> On Wed, 27 Jan 2021 at 10:15, Kyrylo Tkachov
> wrote:
> >
> > Hi Christophe,
> >
> > >
Hi Nathan,
> Solaris tickled this bug as it has some mutex/sync/something primitive with
> a destructor, hence wanted to generate a __cxa_atexit call inside an
> inline/template function. But the problem is not solaris-specific.
>
> I tested this bootstrapping both x86_64-linux and
On Wed, 27 Jan 2021 at 10:15, Kyrylo Tkachov wrote:
>
> Hi Christophe,
>
> > -Original Message-
> > From: Gcc-patches On Behalf Of
> > Christophe Lyon via Gcc-patches
> > Sent: 26 January 2021 18:03
> > To: gcc Patches
> > Subject: arm: Adjust cost of vector of constant zero
> >
> >
I have re-written this to use RTL builtins - regression tested and bootstrapped
on aarch64-none-linux-gnu with no issues:
aarch64: Use RTL builtins for integer mls intrinsics
Rewrite integer mls Neon intrinsics to use RTL builtins rather than
inline assembly code, allowing for better scheduling
Hi everyone,
Here is a better version of the patch.
All tests are on Linux are passing. Few have been disabled as
they are working only with GNU model.
For AIX, few failures remains. I haven't XFAIL them yet, as I
want to know if they AIX only or related to the model itself.
A few part
On Wed, 2021-01-27 at 08:58 +0100, Andreas Krebbel wrote:
> On 1/18/21 10:54 PM, Ilya Leoshkevich wrote:
> ...
>
> > +static rtx_insn *
> > +s390_md_asm_adjust (vec , vec ,
> > + vec _modes,
> > + vec , vec &
> > /*clobbers*/,
> > + HARD_REG_SET &
While looking into the possibility of introducing setmemM patterns on
RISC-V to undo the transformation from loops of word writes into
memset, I was disappointed to find out that get_nonzero_bits would
take into account the range of the length passed to memset, but not
the trivially-available
On 27/01/21 12:40 +, Jonathan Wakely wrote:
On 15/01/21 01:23 +, Paul Fee via Libstdc++ wrote:
Add contains member function to basic_string_view and basic_string.
The new method is enabled for -std=gnu++20, gnu++2b and c++2b. This allows
users to access the method as a GNU extension
On 15/01/21 01:23 +, Paul Fee via Libstdc++ wrote:
Add contains member function to basic_string_view and basic_string.
The new method is enabled for -std=gnu++20, gnu++2b and c++2b. This allows
users to access the method as a GNU extension to C++20. The conditional
test may be reduced to
This patch attempts to fix a libgcc codegen regression introduced in
gcc-10, as -ftree-loop-distribute-patterns was enabled at -O2.
The ldist pass turns even very short loops into memset calls. E.g.,
the TFmode emulation calls end with a loop of up to 3 iterations, to
zero out trailing words,
On Jan 26, 2021, Richard Biener wrote:
> So while I think it's safe let's look at if we can improve tree-nested.c,
> like I see (probably not the correct place):
*nod*, it's just not the *only* place.
> seeing how we adjust current_function_decl around the
>
Hi Paul,
This is a relatively obvious patch. The chunk in trans-array.c is not part
of the fix for the PR but does suppress some of the bad dtype's that arise
from allocation of class objects. The part in trans-stmt.c provides vptrs
for all class allocations if the expression3 is available.
> -Original Message-
> From: Jonathan Wright
> Sent: 26 January 2021 11:43
> To: gcc-patches@gcc.gnu.org
> Cc: Kyrylo Tkachov ; Richard Sandiford
>
> Subject: [PATCH] aarch64: Use RTL builtins for integer mla_n intrinsics
>
> Hi,
>
> As subject, this patch rewrites integer mla_n
This patch fixes PRs 93924/5. It is another 'obvious' patch, whose
consequences are very limited.
I am trying to slip in as many small ready-to-go patches as I can before we
go too far into stage 4. It would be nice to have the patch for PR98573
(posted 23rd Jan) OK'd before the end of the week.
On 1/27/21 11:37 AM, Jakub Jelinek wrote:
> Would equality comparison against 0 handle the most common cases.
>
> The user can write it as
> __atomic_sub_fetch (x, y, z) == 0
> or
> __atomic_fetch_sub (x, y, z) - y == 0
> thouch, so the expansion code would need to be able to cope with both.
This adds a helper to allow verifying of abnormal coalescing
at pass boundaries. It helps debugging issues like PR98845
since it's not always obvious where invalid overlapping life
ranges of abnormals were introduced. The verifier is expensive
so I've added it in a #if 0 block in the usual
On Wed, Jan 27, 2021 at 06:38:23PM +0800, Hongtao Liu wrote:
> Yes, and update patch.
Ok, thanks.
Jakub
On Wed, Jan 27, 2021 at 6:38 PM Hongtao Liu wrote:
>
> On Wed, Jan 27, 2021 at 5:03 PM Jakub Jelinek wrote:
> >
> > On Wed, Jan 27, 2021 at 03:22:45PM +0800, Hongtao Liu wrote:
> > > Hi：
> > > As desribed in PR, also remove the relevant and useless expanders
> > > and builtins, the user can
>
On Wed, Jan 27, 2021 at 5:03 PM Jakub Jelinek wrote:
>
> On Wed, Jan 27, 2021 at 03:22:45PM +0800, Hongtao Liu wrote:
> > Hi：
> > As desribed in PR, also remove the relevant and useless expanders
> > and builtins, the user can
> > directly use == and >, without calling the builtin function.
> >
On Wed, Jan 27, 2021 at 11:22:57AM +0100, Uros Bizjak wrote:
> > Bootstrapped/regtested on x86_64-linux and i686-linux. Is this ok for trunk
> > (as exception), or for GCC 12?
>
> If there is no urgent need, I'd rather see to obey stage-4 and wait
> for gcc-12. There is PR98375 meta bug to track
On Wed, Jan 27, 2021 at 10:20 AM Jakub Jelinek wrote:
>
> Hi!
>
> This patch adds a peephole2 for the optimization requested in the PR,
> namely that we emit awful code for __atomic_sub_fetch (x, y, z) == 0
> or __atomic_sub_fetch (x, y, z) != 0 when y is not constant.
> This can't be done in the
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